From 083ef3fefecd024b2b9cdc496e1f7811c225041e Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Fri, 9 Sep 2016 00:57:31 +0200 Subject: ramips: add support for Mercury MAC1200R v2 MT7628AN + MT7612E, 8MB SPI flash, 64MB DDR RAM reset button GPIO is still missing (anyone?) bootloader password is 'slp' Signed-off-by: Daniel Golle --- target/linux/ramips/dts/MAC1200RV2.dts | 94 ++++++++++++++++++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 target/linux/ramips/dts/MAC1200RV2.dts (limited to 'target/linux/ramips/dts') diff --git a/target/linux/ramips/dts/MAC1200RV2.dts b/target/linux/ramips/dts/MAC1200RV2.dts new file mode 100644 index 0000000000..9576081c82 --- /dev/null +++ b/target/linux/ramips/dts/MAC1200RV2.dts @@ -0,0 +1,94 @@ +/dts-v1/; + +/include/ "mt7628an.dtsi" + +/ { + compatible = "mercury,mac1200rv2", "mediatek,mt7628an-soc"; + model = "Mercury MAC1200R v2"; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x2000000>; + }; + + gpio-leds { + compatible = "gpio-leds"; + status { + label = "mac1200rv2:green:status"; + gpios = <&gpio0 11 1>; + }; + }; +}; + +&spi0 { + status = "okay"; + + m25p80@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "w25q128"; + reg = <0 0>; + linux,modalias = "m25p80", "w25q128"; + spi-max-frequency = <10000000>; + m25p,chunked-io = <32>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x1d800>; + }; + + factory: partition@0x1d800 { + label = "factory_info"; + reg = <0x1d800 0x800>; + read-only; + }; + + art: partition@0x1e000 { + label = "art"; + reg = <0x1e000 0x2000>; + read-only; + }; + + partition@20000 { + label = "config"; + reg = <0x20000 0x10000>; + }; + + partition@30000 { + label = "u-boot2"; + reg = <0x30000 0x10000>; + }; + + partition@40000 { + label = "firmware"; + reg = <0x40000 0x7c0000>; + }; + }; +}; + +ðernet { + pinctrl-names = "default"; + mtd-mac-address = <&factory 0xd>; + ralink,port-map = "llllw"; +}; + +&wmac { + status = "okay"; + ralink,mtd-eeprom = <&art 0x0>; +}; + +&pcie { + status = "okay"; + pcie-bridge { + mt76@0,0 { + reg = <0x0000 0 0 0 0>; + device_type = "pci"; + mediatek,mtd-eeprom = <&art 0x1000>; + mediatek,2ghz = <0>; + }; + }; +}; -- cgit v1.2.3