From 3b0264eddbc94f43a015a965b9eb3e12cfce0655 Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Wed, 3 Jul 2019 23:22:36 +0200 Subject: ramips/rt305x: Name DTS files based on scheme Signed-off-by: Adrian Schmutzler --- target/linux/ramips/dts/rt5350_vocore_vocore.dtsi | 204 ++++++++++++++++++++++ 1 file changed, 204 insertions(+) create mode 100644 target/linux/ramips/dts/rt5350_vocore_vocore.dtsi (limited to 'target/linux/ramips/dts/rt5350_vocore_vocore.dtsi') diff --git a/target/linux/ramips/dts/rt5350_vocore_vocore.dtsi b/target/linux/ramips/dts/rt5350_vocore_vocore.dtsi new file mode 100644 index 0000000000..c5c26e77c8 --- /dev/null +++ b/target/linux/ramips/dts/rt5350_vocore_vocore.dtsi @@ -0,0 +1,204 @@ +#include "rt5350.dtsi" + +#include + +/ { + compatible = "vocore,vocore", "ralink,rt5350-soc"; + + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + gpio-export { + compatible = "gpio-export"; + #size-cells = <0>; + + gpio0 { + gpio-export,name = "gpio0"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>; + }; + + /* UARTF */ + gpio7 { + /* UARTF_RTS_N */ + gpio-export,name = "gpio7"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>; + }; + + gpio8 { + /* UARTF_TXD */ + gpio-export,name = "gpio8"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; + }; + + gpio9 { + /* UARTF_CTS_N */ + gpio-export,name = "gpio9"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>; + }; + + gpio12 { + /* UARTF_DCD_N */ + gpio-export,name = "gpio12"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + }; + + gpio13 { + /* UARTF_DSR_N */ + gpio-export,name = "gpio13"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; + }; + + gpio14 { + /* UARTF_RIN */ + gpio-export,name = "gpio14"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + }; + + /* JTAG */ + gpio17 { + /* JTAG_TDO */ + gpio-export,name = "gpio17"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>; + }; + + gpio18 { + /* JTAG_TDI */ + gpio-export,name = "gpio18"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>; + }; + + gpio19 { + /* JTAG_TMS */ + gpio-export,name = "gpio19"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>; + }; + + gpio20 { + /* JTAG_TCLK */ + gpio-export,name = "gpio20"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>; + }; + + gpio21 { + /* JTAG_TRST_N */ + gpio-export,name = "gpio21"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>; + }; + + /* ETH LEDs */ + gpio22 { + /* ETH0_LED */ + gpio-export,name = "gpio22"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>; + }; + + gpio23 { + /* ETH1_LED */ + gpio-export,name = "gpio23"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>; + }; + + gpio24 { + /* ETH2_LED */ + gpio-export,name = "gpio24"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; + }; + + gpio25 { + /* ETH3_LED */ + gpio-export,name = "gpio25"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; + }; + + gpio26 { + /* ETH4_LED */ + gpio-export,name = "gpio26"; + gpio-export,direction_may_change = <1>; + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status: status { + /* UARTF_RXD */ + label = "vocore:green:status"; + gpios = <&gpio0 10 GPIO_ACTIVE_HIGH>; + }; + + eth { + /* UARTF_DTR_N */ + label = "vocore:orange:eth"; + gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gpio1 { + status = "okay"; +}; + +&i2c { + status = "okay"; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "jtag", "uartf", "led"; + ralink,function = "gpio"; + }; + }; +}; + +ðernet { + mtd-mac-address = <&factory 0x4>; +}; + +&esw { + mediatek,portmap = <0x11>; + mediatek,portdisable = <0x2e>; +}; + +&wmac { + ralink,mtd-eeprom = <&factory 0>; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; + +&spi1 { + status = "okay"; + + spidev@0 { + compatible = "linux,spidev"; + spi-max-frequency = <10000000>; + reg = <0>; + }; +}; -- cgit v1.2.3