From d3e832d6fda8a39e7ec262994f75dac67353dcae Mon Sep 17 00:00:00 2001 From: DENG Qingfang Date: Tue, 23 Jul 2019 20:12:48 +0800 Subject: ramips: add support for HiWiFi HC5761A HiWiFi HC5761A is an "MT7628AN variant" of HC5761 Specifications: - MediaTek MT7628AN 580MHz - 128 MB DDR2 RAM - 16 MB SPI Flash - 2.4G MT7628AN 802.11bgn 2T2R 300Mbps - 5G MT7610EN 802.11ac 433Mbps - 3x 10/100 Mbps Ethernet Flash instruction: 1. Get SSH access to the router 2. SSH to router with `ssh -p 1022 root@192.168.199.1`, The SSH password is the same as the webconfig one 3. Upload OpenWrt sysupgrade firmware into the router's `/tmp` folder with SCP 4. Run `mtd write /tmp/ firmware` 5. reboot Known bug: - SD slot does not work (See PR 1500) Signed-off-by: DENG Qingfang --- .../linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts | 56 ++++++++++++++++++++++ 1 file changed, 56 insertions(+) create mode 100644 target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts (limited to 'target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts') diff --git a/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts b/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts new file mode 100644 index 0000000000..a8b9049391 --- /dev/null +++ b/target/linux/ramips/dts/mt7628an_hiwifi_hc5761a.dts @@ -0,0 +1,56 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "mt7628an_hiwifi_hc5x61a.dtsi" + +/ { + compatible = "hiwifi,hc5761a", "mediatek,mt7628an-soc"; + model = "HiWiFi HC5761A"; + + leds { + compatible = "gpio-leds"; + + led_system: system { + label = "hc5761a:blue:system"; + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; + }; + + internet { + label = "hc5761a:blue:internet"; + gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>; + }; + + wlan2g { + label = "hc5761a:blue:wlan2g"; + gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g { + label = "hc5761a:blue:wlan5g"; + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; + linux,default-trigger = "phy1tpt"; + }; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "refclk", "wdt", "p3led_an", "wled_an"; + ralink,function = "gpio"; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; -- cgit v1.2.3