From 48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7 Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Wed, 3 Jul 2019 23:22:25 +0200 Subject: ramips/mt7620: Name DTS files based on scheme As introduced with ath79, DTS files for ramips will now be labelled soc_vendor_device.dts(i). With this change, DTS files can be selected automatically without further manual links. Signed-off-by: Adrian Schmutzler --- .../ramips/dts/mt7620a_tplink_archer-c2-v1.dts | 191 +++++++++++++++++++++ 1 file changed, 191 insertions(+) create mode 100644 target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts (limited to 'target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts') diff --git a/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts b/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts new file mode 100644 index 0000000000..e20b873569 --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_tplink_archer-c2-v1.dts @@ -0,0 +1,191 @@ +/dts-v1/; + +#include "mt7620a.dtsi" + +#include +#include + +/ { + compatible = "tplink,archer-c2-v1", "ralink,mt7620a-soc"; + model = "TP-Link Archer C2 v1"; + + aliases { + led-boot = &led_wps; + led-failsafe = &led_wps; + led-running = &led_wps; + led-upgrade = &led_wps; + }; + + chosen { + bootargs = "console=ttyS0,115200"; + }; + + pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "uartf", "wled", "ephy", "spi refclk"; + ralink,function = "gpio"; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + lan { + label = "c2-v1:green:lan"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + }; + + usb { + label = "c2-v1:green:usb"; + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + linux,default-trigger = "usbport"; + }; + + led_wps: wps { + label = "c2-v1:green:wps"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + }; + + wan { + label = "c2-v1:green:wan"; + gpios = <&gpio2 0 GPIO_ACTIVE_LOW>; + }; + + wlan { + label = "c2-v1:green:wlan"; + gpios = <&gpio3 0 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset_wps { + label = "reset_wps"; + gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + rfkill { + label = "rfkill"; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + rtl8367rb { + compatible = "realtek,rtl8367b", "rtl8367b"; + cpu_port = <6>; + realtek,extif1 = <1 0 1 1 1 1 1 1 2>; + mii-bus = <&mdio0>; + }; +}; + +&spi0 { + status = "okay"; + + m25p80@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x20000>; + read-only; + }; + + partition@20000 { + compatible = "tplink,firmware"; + label = "firmware"; + reg = <0x20000 0x7a0000>; + }; + + partition@7c0000 { + label = "config"; + reg = <0x7c0000 0x10000>; + read-only; + }; + + rom: partition@7d0000 { + label = "rom"; + reg = <0x7d0000 0x10000>; + read-only; + }; + + partition@7e0000 { + label = "romfile"; + reg = <0x7e0000 0x10000>; + read-only; + }; + + radio: partition@7f0000 { + label = "radio"; + reg = <0x7f0000 0x10000>; + read-only; + }; + }; + }; +}; + +ðernet { + status = "okay"; + mtd-mac-address = <&rom 0xf100>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; + + port@5 { + status = "okay"; + mediatek,fixed-link = <1000 1 1 1>; + phy-mode = "rgmii"; + }; + + mdio0: mdio-bus { + status = "okay"; + }; +}; + + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&gpio3 { + status = "okay"; +}; + +&wmac { + ralink,mtd-eeprom = <&radio 0>; + mtd-mac-address = <&rom 0xf100>; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + mt76@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&radio 0x8000>; + }; +}; -- cgit v1.2.3