From 48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7 Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Wed, 3 Jul 2019 23:22:25 +0200 Subject: ramips/mt7620: Name DTS files based on scheme As introduced with ath79, DTS files for ramips will now be labelled soc_vendor_device.dts(i). With this change, DTS files can be selected automatically without further manual links. Signed-off-by: Adrian Schmutzler --- target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts | 181 +++++++++++++++++++++ 1 file changed, 181 insertions(+) create mode 100644 target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts (limited to 'target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts') diff --git a/target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts b/target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts new file mode 100644 index 0000000000..20974c93e2 --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_lava_lr-25g001.dts @@ -0,0 +1,181 @@ +/dts-v1/; + +#include "mt7620a.dtsi" + +#include +#include + +/ { + compatible = "lava,lr-25g001", "ralink,mt7620a-soc"; + model = "LAVA LR-25G001"; + + aliases { + led-boot = &led_status; + led-failsafe = &led_status; + led-running = &led_status; + led-upgrade = &led_status; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + wps { + label = "wps"; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + reset { + label = "reset"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_status: status { + label = "lr-25g001:green:status"; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + }; + + wifi2g { + label = "lr-25g001:green:wifi2g"; + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + }; + + wifi5g { + label = "lr-25g001:green:wifi5g"; + gpios = <&gpio0 13 GPIO_ACTIVE_LOW>; + }; + }; + + gpio_export { + compatible = "gpio-export"; + #size-cells = <0>; + + usbpower { + gpio-export,name = "usbpower"; + gpio-export,output = <1>; + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; + }; + }; +}; + +&gpio0 { + status = "okay"; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "jboot"; + reg = <0x0 0x10000>; + read-only; + }; + + partition@10000 { + compatible = "amit,jimage"; + label = "firmware"; + reg = <0x10000 0xfe0000>; + }; + + config: partition@ff0000 { + label = "config"; + reg = <0xff0000 0x10000>; + read-only; + }; + }; + }; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; + +ðernet { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; + + port@5 { + status = "okay"; + phy-mode = "rgmii"; + mediatek,fixed-link = <1000 1 1 1>; + }; + + mdio-bus { + status = "okay"; + mediatek,mdio-mode = <1>; + + phy0: ethernet-phy@0 { + reg = <0>; + phy-mode = "rgmii"; + qca,ar8327-initvals = < + 0x04 0x87300000 /* PORT0 PAD MODE CTRL */ + 0x0c 0x00000000 /* PORT6 PAD MODE CTRL */ + 0x7c 0x0000007e /* PORT0_STATUS */ + 0x94 0x00000000 /* PORT6_STATUS */ + >; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + phy-mode = "rgmii"; + }; + + phy2: ethernet-phy@2 { + reg = <2>; + phy-mode = "rgmii"; + }; + + phy3: ethernet-phy@3 { + reg = <3>; + phy-mode = "rgmii"; + }; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + }; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + mt76x0e@0,0 { + reg = <0x0000 0 0 0 0>; + mtd-mac-address = <&config 0xe07e>; + mtd-mac-address-increment = <(2)>; + mediatek,mtd-eeprom = <&config 0xe08a>; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "uartf", "i2c"; + ralink,function = "gpio"; + }; + }; +}; -- cgit v1.2.3