From 9169482f640ca840ff478ddd03ee2cb275d21c23 Mon Sep 17 00:00:00 2001 From: Sungbo Eo Date: Fri, 27 Sep 2019 00:21:25 +0900 Subject: ramips: add support for ipTIME A1004ns ipTIME A1004ns is a 2.4/5GHz band AC750 router, based on MediaTek MT7620A. Specifications: - SoC: MT7620A - RAM: DDR2 128MB - Flash: SPI NOR 16MB - WiFi: - 2.4GHz: SoC internal - 5GHz: MT7610EN - Ethernet: 5x 10/100/1000Mbps - Switch: MT7530BU - USB: 1x 2.0 - UART: - J2: 3.3V, TX, RX, GND (3.3V is the square pad) / 57600 8N1 Installation via web interface: 1. Flash **initramfs** image through the stock web interface. 2. Boot into OpenWrt and perform sysupgrade with sysupgrade image. Revert to stock firmware: 1. Perform sysupgrade with stock image. Signed-off-by: Sungbo Eo --- target/linux/ramips/dts/mt7620a_iptime_a1004ns.dts | 104 +++++++++++++++++++++ 1 file changed, 104 insertions(+) create mode 100644 target/linux/ramips/dts/mt7620a_iptime_a1004ns.dts (limited to 'target/linux/ramips/dts/mt7620a_iptime_a1004ns.dts') diff --git a/target/linux/ramips/dts/mt7620a_iptime_a1004ns.dts b/target/linux/ramips/dts/mt7620a_iptime_a1004ns.dts new file mode 100644 index 0000000000..02b674963b --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_iptime_a1004ns.dts @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "mt7620a_iptime.dtsi" + +/ { + compatible = "iptime,a1004ns", "ralink,mt7620a-soc"; + model = "ipTIME A1004ns"; + + aliases { + led-boot = &led_cpu; + led-failsafe = &led_cpu; + led-running = &led_cpu; + led-upgrade = &led_cpu; + }; + + leds { + compatible = "gpio-leds"; + + led_cpu: cpu { + label = "a1004ns:blue:cpu"; + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + }; + + usb { + label = "a1004ns:blue:usb"; + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + linux,default-trigger = "usbport"; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + wps { + label = "wps"; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; +}; + +&firmware { + reg = <0x30000 0xfd0000>; +}; + +&state_default { + gpio { + ralink,group = "i2c", "uartf", "spi refclk"; + ralink,function = "gpio"; + }; +}; + +ðernet { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &mdio_pins>; + + port@5 { + status = "okay"; + mediatek,fixed-link = <1000 1 1 1>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + ethernet-phy@0 { + reg = <0>; + phy-mode = "rgmii"; + }; + + ethernet-phy@1 { + reg = <1>; + phy-mode = "rgmii"; + }; + + ethernet-phy@2 { + reg = <2>; + phy-mode = "rgmii"; + }; + + ethernet-phy@3 { + reg = <3>; + phy-mode = "rgmii"; + }; + + ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + + ethernet-phy@1f { + reg = <0x1f>; + phy-mode = "rgmii"; + }; + }; +}; -- cgit v1.2.3