From 48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7 Mon Sep 17 00:00:00 2001 From: Adrian Schmutzler Date: Wed, 3 Jul 2019 23:22:25 +0200 Subject: ramips/mt7620: Name DTS files based on scheme As introduced with ath79, DTS files for ramips will now be labelled soc_vendor_device.dts(i). With this change, DTS files can be selected automatically without further manual links. Signed-off-by: Adrian Schmutzler --- .../linux/ramips/dts/mt7620a_edimax_ew-7478apc.dts | 202 +++++++++++++++++++++ 1 file changed, 202 insertions(+) create mode 100644 target/linux/ramips/dts/mt7620a_edimax_ew-7478apc.dts (limited to 'target/linux/ramips/dts/mt7620a_edimax_ew-7478apc.dts') diff --git a/target/linux/ramips/dts/mt7620a_edimax_ew-7478apc.dts b/target/linux/ramips/dts/mt7620a_edimax_ew-7478apc.dts new file mode 100644 index 0000000000..bd1768b34e --- /dev/null +++ b/target/linux/ramips/dts/mt7620a_edimax_ew-7478apc.dts @@ -0,0 +1,202 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "mt7620a.dtsi" + +#include +#include + +/ { + compatible = "edimax,ew-7478apc", "ralink,mt7620a-soc"; + model = "Edimax EW-7478APC"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + chosen { + bootargs = "console=ttyS0,57600"; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + reset_wps { + label = "reset_wps"; + gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_power: power { + label = "ew-7478apc:white:power"; + gpios = <&gpio0 11 GPIO_ACTIVE_LOW>; + }; + + internet { + label = "ew-7478apc:blue:internet"; + gpios = <&gpio0 7 GPIO_ACTIVE_LOW>; + }; + + wlan { + label = "ew-7478apc:blue:wlan"; + gpios = <&gpio0 10 GPIO_ACTIVE_LOW>; + }; + + usb { + label = "ew-7478apc:blue:usb"; + gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; + trigger-sources = <&ohci_port1>, <&ehci_port1>; + linux,default-trigger = "usbport"; + }; + }; +}; + +&gpio2 { + status = "okay"; + + enable_usb_power { + gpio-hog; + line-name = "enable USB power"; + gpios = <5 GPIO_ACTIVE_HIGH>; + output-high; + }; +}; + +&spi0 { + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x0 0x30000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x30000 0x10000>; + read-only; + }; + + factory: partition@40000 { + label = "factory"; + reg = <0x40000 0x10000>; + read-only; + }; + + partition@50000 { + label = "cimage"; + reg = <0x50000 0x20000>; + read-only; + }; + + partition@70000 { + compatible = "edimax,uimage"; + label = "firmware"; + reg = <0x00070000 0x00790000>; + }; + }; + }; +}; + +&pinctrl { + state_default: pinctrl0 { + gpio { + ralink,group = "i2c", "uartf", "nd_sd"; + ralink,function = "gpio"; + }; + }; +}; + +ðernet { + status = "okay"; + mtd-mac-address = <&factory 0x4>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>; + mediatek,portmap = "wllll"; + + port@5 { + status = "okay"; + mediatek,fixed-link = <1000 1 1 1>; + phy-mode = "rgmii"; + }; + + mdio-bus { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + phy-mode = "rgmii"; + }; + + phy1: ethernet-phy@1 { + reg = <1>; + phy-mode = "rgmii"; + }; + + phy2: ethernet-phy@2 { + reg = <2>; + phy-mode = "rgmii"; + }; + + phy3: ethernet-phy@3 { + reg = <3>; + phy-mode = "rgmii"; + }; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; + + phy1f: ethernet-phy@1f { + reg = <0x1f>; + phy-mode = "rgmii"; + }; + }; +}; + +&gsw { + mediatek,port4 = "gmac"; +}; + +&wmac { + ralink,mtd-eeprom = <&factory 0>; +}; + +&pcie { + status = "okay"; +}; + +&pcie0 { + wifi@0,0 { + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x8000>; + mediatek,2ghz = <0>; + }; +}; + +&ehci { + status = "okay"; +}; + +&ohci { + status = "okay"; +}; -- cgit v1.2.3