From 48047b3a5c6aa9fff89a7a9c7ec76d8335b1a8e7 Mon Sep 17 00:00:00 2001
From: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Date: Wed, 3 Jul 2019 23:22:25 +0200
Subject: ramips/mt7620: Name DTS files based on scheme

As introduced with ath79, DTS files for ramips will now be labelled
soc_vendor_device.dts(i). With this change, DTS files can be
selected automatically without further manual links.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
---
 target/linux/ramips/dts/mt7620a_dlink_dir-810l.dts | 154 +++++++++++++++++++++
 1 file changed, 154 insertions(+)
 create mode 100644 target/linux/ramips/dts/mt7620a_dlink_dir-810l.dts

(limited to 'target/linux/ramips/dts/mt7620a_dlink_dir-810l.dts')

diff --git a/target/linux/ramips/dts/mt7620a_dlink_dir-810l.dts b/target/linux/ramips/dts/mt7620a_dlink_dir-810l.dts
new file mode 100644
index 0000000000..d728449a48
--- /dev/null
+++ b/target/linux/ramips/dts/mt7620a_dlink_dir-810l.dts
@@ -0,0 +1,154 @@
+/dts-v1/;
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "dlink,dir-810l", "ralink,mt7620a-soc";
+	model = "D-Link DIR-810L";
+
+	aliases {
+		led-boot = &led_power_green;
+		led-failsafe = &led_power_green;
+		led-running = &led_power_green;
+		led-upgrade = &led_power_green;
+	};
+
+	keys {
+		compatible = "gpio-keys-polled";
+		poll-interval = <20>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <BTN_0>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power_green: power {
+			label = "dir-810l:green:power";
+			gpios = <&gpio0 9 GPIO_ACTIVE_HIGH>;
+		};
+
+		wan {
+			label = "dir-810l:orange:wan";
+			gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+		};
+
+		power2 {
+			label = "dir-810l:orange:power";
+			gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	m25p80@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <10000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			factory5g: partition@50000 {
+				label = "factory5g";
+				reg = <0x50000 0x10000>;
+				read-only;
+			};
+
+			partition@60000 {
+				label = "Wolf_Config";
+				reg = <0x60000 0x10000>;
+				read-only;
+			};
+
+			partition@70000 {
+				label = "MyDlink";
+				reg = <0x70000 0x80000>;
+				read-only;
+			};
+
+			partition@e0000 {
+				label = "Jffs2";
+				reg = <0xe0000 0x80000>;
+				read-only;
+			};
+
+			partition@170000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x170000 0x690000>;
+			};
+		};
+	};
+};
+
+&pinctrl {
+	state_default: pinctrl0 {
+		gpio {
+			ralink,group = "mdio", "rgmii1", "i2c", "wled", "uartf";
+			ralink,function = "gpio";
+		};
+	};
+};
+
+&ethernet {
+	mtd-mac-address = <&factory 0x28>;
+	mediatek,portmap = "llllw";
+};
+
+&gsw {
+	mediatek,port4 = "ephy";
+	pinctrl-names = "default";
+	pinctrl-0 = <&ephy_pins>;
+};
+
+&pcie {
+	status = "okay";
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&factory 0>;
+};
+
+&pcie0 {
+	wifi@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x8000>;
+		ieee80211-freq-limit = <5000000 6000000>;
+	};
+};
-- 
cgit v1.2.3