From 4050cfebdaa001d498c396f24dd67771541b710e Mon Sep 17 00:00:00 2001
From: YuheiOKAWA <tochiro.srchack@gmail.com>
Date: Mon, 10 Oct 2016 10:24:42 +0900
Subject: ramips: add support for Planex VR500.

SOC:	MT7621A
RAM:	256MiB
NOR:	MX25L51245G

Non Wireless Router.

Issue: soft reboot problem. SPI Flash do not exit 4byte address mode.

Signed-off-by: Yuhei Okawa <tochiro.srchack@gmail.com>
---
 target/linux/ramips/dts/VR500.dts | 92 +++++++++++++++++++++++++++++++++++++++
 1 file changed, 92 insertions(+)
 create mode 100644 target/linux/ramips/dts/VR500.dts

(limited to 'target/linux/ramips/dts/VR500.dts')

diff --git a/target/linux/ramips/dts/VR500.dts b/target/linux/ramips/dts/VR500.dts
new file mode 100644
index 0000000000..3cddce6fbe
--- /dev/null
+++ b/target/linux/ramips/dts/VR500.dts
@@ -0,0 +1,92 @@
+/dts-v1/;
+
+#include "mt7621.dtsi"
+
+/ {
+	compatible = "ralink,mt7621-eval-board", "ralink,mt7621-soc";
+	model = "Planex VR500";
+
+	memory@0 {
+		device_type = "memory";
+		reg = <0x0 0x10000000>;
+	};
+
+	chosen {
+		bootargs = "console=ttyS0,57600";
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		power {
+			label = "vr500:green:power";
+			gpios = <&gpio1 13 1>;
+		};
+	};
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+
+		reset {
+			label = "reset";
+			gpios = <&gpio1 15 1>;
+			linux,code = <0x198>;
+		};
+	};
+};
+
+&xhci {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	m25p80@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		linux,modalias = "m25p80";
+		spi-max-frequency = <10000000>;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x0 0x30000>;
+			read-only;
+		};
+
+		partition@30000 {
+			label = "u-boot-env";
+			reg = <0x30000 0x10000>;
+			read-only;
+		};
+
+		factory: partition@40000 {
+			label = "factory";
+			reg = <0x40000 0x10000>;
+			read-only;
+		};
+
+		partition@50000 {
+			label = "firmware";
+			reg = <0x50000 0x3fb0000>;
+		};
+	};
+};
+
+&pinctrl {
+	state_default: pinctrl0 {
+		gpio {
+			ralink,group = "i2c", "uart2", "uart3", "rgmii2", "sdhci";
+			ralink,function = "gpio";
+		};
+	};
+};
+
+&pcie {
+	status = "disabled";
+};
-- 
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