From ec1de9b1a6cd957bb2cb68f7eda294ab73bf9102 Mon Sep 17 00:00:00 2001
From: Giuseppe Lippolis <giu.lippolis@gmail.com>
Date: Sun, 13 Nov 2016 23:36:00 +0100
Subject: ramips: Add device DLINK DWR-512-B

The Dlink DWR-512-B modem is a ralink 5350 processor based embedding
a 3G mini-pcie router.

The oem JBOOT bootloader has to be replaced by a RT5350 SDK
U-Boot such as https://github.com/stevenylai/ralink_sdk - U-Boot
configured for the RT5350 256MiB SDR.

Main reason to change the bootloader is the encrypted header used to
store the kernel image. In this way an image can only be generated
using the propietary binboy tool (included in the GPL distribution
from Dlink). The binboy tool doesn't allow to modify the kernel/rootfs
partition scheme. This is considered a big constraint (limited kernel
size and inefficient usage of flash space).

For interested people I pubblished the details of my investigation
about the encrypted firmware header here:
http://lists.infradead.org/pipermail/lede-dev/2016-October/003435.html

Signed-off-by: Giuseppe Lippolis <giu.lippolis@gmail.com>
---
 target/linux/ramips/dts/DWR-512-B.dts | 128 ++++++++++++++++++++++++++++++++++
 1 file changed, 128 insertions(+)
 create mode 100644 target/linux/ramips/dts/DWR-512-B.dts

(limited to 'target/linux/ramips/dts/DWR-512-B.dts')

diff --git a/target/linux/ramips/dts/DWR-512-B.dts b/target/linux/ramips/dts/DWR-512-B.dts
new file mode 100644
index 0000000000..ab3c02aeb3
--- /dev/null
+++ b/target/linux/ramips/dts/DWR-512-B.dts
@@ -0,0 +1,128 @@
+/dts-v1/;
+
+#include "rt5350.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "ralink,rt5350-soc";
+	model = "D-Link DWR-512 B";
+
+	gpio-keys-polled {
+		compatible = "gpio-keys-polled";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		poll-interval = <20>;
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		sms {
+			label = "dwr-512-b:green:sms";
+			gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
+		};
+		status {
+			label = "dwr-512-b:green:status";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+		};
+		2g {
+			label = "dwr-512-b:green:2g";
+			gpios = <&gpio0 17 GPIO_ACTIVE_LOW>;
+		};
+		3g {
+			label = "dwr-512-b:green:3g";
+			gpios = <&gpio0 19 GPIO_ACTIVE_LOW>;
+		};
+		sstrengthr {
+			label = "dwr-512-b:red:sigstrength";
+			gpios = <&gpio0 20 GPIO_ACTIVE_LOW>;
+		};
+		sstrengthg {
+			label = "dwr-512-b:green:sigstrength";
+			gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		modem3g_enable {
+			gpio-export,name = "modem3g_enable";
+			gpio-export,output = <1>;
+			gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
+		};
+	};
+};
+
+&spi0 {
+	status = "okay";
+
+	mx25l6405d@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <30000000>;
+		m25p,fast-read;
+
+		partition@0 {
+			label = "u-boot";
+			reg = <0x0 0x30000>;
+			read-only;
+		};
+
+		partition@30000 {
+			label = "u-boot-env";
+			reg = <0x30000 0x20000>;
+			read-only;
+		};
+
+		partition@50000 {
+			label = "firmware";
+			reg = <0x50000 0x7a0000>;
+		};
+
+		config: partition@7f0000 {
+			label = "config";
+			reg = <0x7f0000 0x10000>;
+		};
+	};
+};
+
+&pinctrl {
+	state_default: pinctrl0 {
+		gpio {
+			ralink,group = "i2c", "jtag", "uartf";
+			ralink,function = "gpio";
+		};
+	};
+};
+
+&esw {
+	mediatek,portmap = <0x2f>;
+};
+
+&ethernet {
+	mtd-mac-address = <&config 0xe07e>;
+};
+
+&wmac {
+	ralink,mtd-eeprom = <&config 0xe08a>;
+	ralink,led-polarity = <1>;
+	mtd-mac-address = <&config 0xe07e>;
+};
-- 
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