From 4108c0c1b6965b3a4e5fbaa1171310875e80f76e Mon Sep 17 00:00:00 2001 From: Chukun Pan Date: Mon, 15 Jan 2024 23:28:13 +0800 Subject: qualcommax: backport more changes for ipq6018 and ipq8074 - Mark patches as upstream - Backport more upstream changes - Handle conflicts and refresh patches Signed-off-by: Chukun Pan --- ...-qcom-add-few-more-reserved-memory-region.patch | 92 ++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch (limited to 'target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch') diff --git a/target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch b/target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch new file mode 100644 index 00000000000..d1280b528be --- /dev/null +++ b/target/linux/qualcommax/patches-6.1/0039-v6.5-arm64-dts-qcom-add-few-more-reserved-memory-region.patch @@ -0,0 +1,92 @@ +From 0cd4e90cb2dec02ff859f5c98f744f43a23aea65 Mon Sep 17 00:00:00 2001 +From: Vignesh Viswanathan +Date: Fri, 26 May 2023 16:36:53 +0530 +Subject: [PATCH] arm64: dts: qcom: add few more reserved memory region + +In IPQ SoCs, bootloader will collect the system RAM contents upon crash +for the post morterm analysis. If we don't reserve the memory region used +by bootloader, obviously linux will consume it and upon next boot on +crash, bootloader will be loaded in the same region, which will lead to +loose some of the data, sometimes we may miss out critical information. +So lets reserve the region used by the bootloader. + +Similarly SBL copies some data into the reserved region and it will be +used in the crash scenario. So reserve 1MB for SBL as well. + +While at it, drop the size padding in the reserved memory region, +wherever applicable. + +Signed-off-by: Vignesh Viswanathan +Signed-off-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20230526110653.27777-4-quic_viswanat@quicinc.com +--- + arch/arm64/boot/dts/qcom/ipq6018.dtsi | 16 +++++++++++++--- + arch/arm64/boot/dts/qcom/ipq8074.dtsi | 14 ++++++++++++-- + 2 files changed, 25 insertions(+), 5 deletions(-) + +--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi +@@ -154,18 +154,28 @@ + no-map; + }; + ++ bootloader@4a100000 { ++ reg = <0x0 0x4a100000 0x0 0x400000>; ++ no-map; ++ }; ++ ++ sbl@4a500000 { ++ reg = <0x0 0x4a500000 0x0 0x100000>; ++ no-map; ++ }; ++ + tz: memory@4a600000 { +- reg = <0x0 0x4a600000 0x0 0x00400000>; ++ reg = <0x0 0x4a600000 0x0 0x400000>; + no-map; + }; + + smem_region: memory@4aa00000 { +- reg = <0x0 0x4aa00000 0x0 0x00100000>; ++ reg = <0x0 0x4aa00000 0x0 0x100000>; + no-map; + }; + + q6_region: memory@4ab00000 { +- reg = <0x0 0x4ab00000 0x0 0x05500000>; ++ reg = <0x0 0x4ab00000 0x0 0x5500000>; + no-map; + }; + }; +--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi +@@ -85,17 +85,27 @@ + #size-cells = <2>; + ranges; + ++ bootloader@4a600000 { ++ reg = <0x0 0x4a600000 0x0 0x400000>; ++ no-map; ++ }; ++ ++ sbl@4aa00000 { ++ reg = <0x0 0x4aa00000 0x0 0x100000>; ++ no-map; ++ }; ++ + smem@4ab00000 { + compatible = "qcom,smem"; +- reg = <0x0 0x4ab00000 0x0 0x00100000>; ++ reg = <0x0 0x4ab00000 0x0 0x100000>; + no-map; + + hwlocks = <&tcsr_mutex 3>; + }; + + memory@4ac00000 { ++ reg = <0x0 0x4ac00000 0x0 0x400000>; + no-map; +- reg = <0x0 0x4ac00000 0x0 0x00400000>; + }; + }; + -- cgit v1.2.3