From ecf2d3a6efc961083f4204bc89d79b7e0fecdad0 Mon Sep 17 00:00:00 2001 From: Imre Kaloz Date: Thu, 5 Feb 2015 11:34:21 +0000 Subject: mvebu: add Armada 385 DB AP support Signed-off-by: Maxime Ripard Signed-off-by: Imre Kaloz git-svn-id: svn://svn.openwrt.org/openwrt/trunk@44266 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- ...-mvebu-A385-AP-Enable-the-NAND-controller.patch | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 target/linux/mvebu/patches-3.18/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch (limited to 'target/linux/mvebu/patches-3.18/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch') diff --git a/target/linux/mvebu/patches-3.18/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch b/target/linux/mvebu/patches-3.18/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch new file mode 100644 index 0000000000..85a9511547 --- /dev/null +++ b/target/linux/mvebu/patches-3.18/022-ARM-mvebu-A385-AP-Enable-the-NAND-controller.patch @@ -0,0 +1,39 @@ +From 7eb1f09ec8e25aa2fc3f6fc5fc9405d9f917d503 Mon Sep 17 00:00:00 2001 +From: Maxime Ripard +Date: Thu, 11 Dec 2014 14:14:58 +0100 +Subject: [PATCH 1/2] ARM: mvebu: A385-AP: Enable the NAND controller + +The A385 AP has a 1GB NAND chip. Enable it. + +Signed-off-by: Maxime Ripard +--- + arch/arm/boot/dts/armada-385-db-ap.dts | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +diff --git a/arch/arm/boot/dts/armada-385-db-ap.dts b/arch/arm/boot/dts/armada-385-db-ap.dts +index 3a51531eb37b..02db04867d8f 100644 +--- a/arch/arm/boot/dts/armada-385-db-ap.dts ++++ b/arch/arm/boot/dts/armada-385-db-ap.dts +@@ -122,6 +122,19 @@ + phy = <&phy0>; + phy-mode = "rgmii-id"; + }; ++ ++ nfc: flash@d0000 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ num-cs = <1>; ++ nand-ecc-strength = <4>; ++ nand-ecc-step-size = <512>; ++ marvell,nand-keep-config; ++ marvell,nand-enable-arbiter; ++ nand-on-flash-bbt; ++ }; + }; + + pcie-controller { +-- +2.2.1 + -- cgit v1.2.3