From 57b323ce38f327557d1b016dddd712bb4a8e0854 Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Sun, 3 Oct 2021 00:42:49 +0200 Subject: kernel: Deactivate some ARM64 errata workarounds This deactivates the following workarounds for erratas in ARM64 CPUS: CONFIG_ARM64_ERRATUM_1165522: Cortex-A76 cores (r0p0, r1p0, r2p0) CONFIG_ARM64_ERRATUM_1286807: Cortex-A76 cores (r0p0 to r3p0) CONFIG_ARM64_ERRATUM_1418040: Cortex-A76/Neoverse-N1 cores (r0p0 to r3p1) CONFIG_CAVIUM_TX2_ERRATUM_219: Cavium ThunderX2 CONFIG_FUJITSU_ERRATUM_010001: Fujitsu-A64FX Signed-off-by: Hauke Mehrtens --- target/linux/mvebu/cortexa53/config-5.10 | 4 ---- 1 file changed, 4 deletions(-) (limited to 'target/linux/mvebu/cortexa53') diff --git a/target/linux/mvebu/cortexa53/config-5.10 b/target/linux/mvebu/cortexa53/config-5.10 index 24f26474bc..78373ad732 100644 --- a/target/linux/mvebu/cortexa53/config-5.10 +++ b/target/linux/mvebu/cortexa53/config-5.10 @@ -9,8 +9,6 @@ CONFIG_ARCH_SPARSEMEM_DEFAULT=y CONFIG_ARCH_STACKWALK=y CONFIG_ARM64=y CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_ERRATUM_1165522 is not set -# CONFIG_ARM64_ERRATUM_1286807 is not set CONFIG_ARM64_PAGE_SHIFT=12 CONFIG_ARM64_PA_BITS=48 CONFIG_ARM64_PA_BITS_48=y @@ -32,12 +30,10 @@ CONFIG_ARM_GIC_V3_ITS_PCI=y # CONFIG_ARM_PL172_MPMC is not set CONFIG_ARM_PSCI_FW=y CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_CAVIUM_TX2_ERRATUM_219 is not set CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_DMA_DIRECT_REMAP=y # CONFIG_FLATMEM_MANUAL is not set CONFIG_FRAME_POINTER=y -# CONFIG_FUJITSU_ERRATUM_010001 is not set CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y CONFIG_GENERIC_CPU_VULNERABILITIES=y CONFIG_GENERIC_CSUM=y -- cgit v1.2.3