From 050da2107a7eb2a571a8a3d0cee21cc6a44b72b8 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 7 May 2018 12:07:32 +0200 Subject: mediatek: backport upstream mediatek patches Signed-off-by: John Crispin --- ...k-update-missing-clock-data-for-MT7622-au.patch | 45 ++++++++++++++++++++++ 1 file changed, 45 insertions(+) create mode 100644 target/linux/mediatek/patches-4.14/0208-clk-mediatek-update-missing-clock-data-for-MT7622-au.patch (limited to 'target/linux/mediatek/patches-4.14/0208-clk-mediatek-update-missing-clock-data-for-MT7622-au.patch') diff --git a/target/linux/mediatek/patches-4.14/0208-clk-mediatek-update-missing-clock-data-for-MT7622-au.patch b/target/linux/mediatek/patches-4.14/0208-clk-mediatek-update-missing-clock-data-for-MT7622-au.patch new file mode 100644 index 0000000000..c1f7682eec --- /dev/null +++ b/target/linux/mediatek/patches-4.14/0208-clk-mediatek-update-missing-clock-data-for-MT7622-au.patch @@ -0,0 +1,45 @@ +From 0725349768e96542ef06efbd87925a8603cba16a Mon Sep 17 00:00:00 2001 +From: Ryder Lee +Date: Tue, 6 Mar 2018 17:09:26 +0800 +Subject: [PATCH 208/224] clk: mediatek: update missing clock data for MT7622 + audsys + +Add missing clock data 'CLK_AUDIO_AFE_CONN' for MT7622 audsys. + +Signed-off-by: Ryder Lee +Reviewed-by: Rob Herring +Reviewed-by: Matthias Brugger +--- + drivers/clk/mediatek/clk-mt7622-aud.c | 1 + + include/dt-bindings/clock/mt7622-clk.h | 3 ++- + 2 files changed, 3 insertions(+), 1 deletion(-) + +diff --git a/drivers/clk/mediatek/clk-mt7622-aud.c b/drivers/clk/mediatek/clk-mt7622-aud.c +index fad7d9fc53ba..13f752de7adc 100644 +--- a/drivers/clk/mediatek/clk-mt7622-aud.c ++++ b/drivers/clk/mediatek/clk-mt7622-aud.c +@@ -106,6 +106,7 @@ static const struct mtk_gate audio_clks[] = { + GATE_AUDIO1(CLK_AUDIO_INTDIR, "audio_intdir", "intdir_sel", 20), + GATE_AUDIO1(CLK_AUDIO_A1SYS, "audio_a1sys", "a1sys_hp_sel", 21), + GATE_AUDIO1(CLK_AUDIO_A2SYS, "audio_a2sys", "a2sys_hp_sel", 22), ++ GATE_AUDIO1(CLK_AUDIO_AFE_CONN, "audio_afe_conn", "a1sys_hp_sel", 23), + /* AUDIO2 */ + GATE_AUDIO2(CLK_AUDIO_UL1, "audio_ul1", "a1sys_hp_sel", 0), + GATE_AUDIO2(CLK_AUDIO_UL2, "audio_ul2", "a1sys_hp_sel", 1), +diff --git a/include/dt-bindings/clock/mt7622-clk.h b/include/dt-bindings/clock/mt7622-clk.h +index 3e514ed51d15..e9d77f0e8bce 100644 +--- a/include/dt-bindings/clock/mt7622-clk.h ++++ b/include/dt-bindings/clock/mt7622-clk.h +@@ -235,7 +235,8 @@ + #define CLK_AUDIO_MEM_ASRC3 43 + #define CLK_AUDIO_MEM_ASRC4 44 + #define CLK_AUDIO_MEM_ASRC5 45 +-#define CLK_AUDIO_NR_CLK 46 ++#define CLK_AUDIO_AFE_CONN 46 ++#define CLK_AUDIO_NR_CLK 47 + + /* SSUSBSYS */ + +-- +2.11.0 + -- cgit v1.2.3