From 7cbe34170e3d8471c1ebacde33a2372c92433be4 Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Sat, 11 Mar 2023 03:56:35 +0000 Subject: mediatek: add support for the GL.iNet GL-MT3000 The MT-3000 is a pocket-sized Wi-Fi 6 router based on MediaTek MT7981. Specification: - SoC: MediaTek MT7981B - CPU: 2x 1.3 GHz Cortex-A53 - Flash: 256 MiB Macronix SPI NAND - RAM: 512 MiB Nanya DDR4 - WLAN: 2.4 GHz, 5 GHz (MediaTek MT7976CN) - Ethernet: - 1x 10/100/1000 Mbps built-in PHY (LAN) - 1x 10/100/1000/2500 Mbps MaxLinear GPY211 PHY (WAN) - USB 3.0 port - Buttons: 1 button, 1 switch - LEDs: 1x light-blue, 1x warm-white - Serial console: internal 4-pin header, 115200 8n1 - PWM controlled fan with tacho - Power: 5 VDC, 3 A (USB Type-C) Signed-off-by: Daniel Golle --- .../mediatek/dts/mt7981b-glinet-gl-mt3000.dts | 240 +++++++++++++++++++++ 1 file changed, 240 insertions(+) create mode 100644 target/linux/mediatek/dts/mt7981b-glinet-gl-mt3000.dts (limited to 'target/linux/mediatek/dts') diff --git a/target/linux/mediatek/dts/mt7981b-glinet-gl-mt3000.dts b/target/linux/mediatek/dts/mt7981b-glinet-gl-mt3000.dts new file mode 100644 index 0000000000..d916ee49ef --- /dev/null +++ b/target/linux/mediatek/dts/mt7981b-glinet-gl-mt3000.dts @@ -0,0 +1,240 @@ +/dts-v1/; + +#include "mt7981.dtsi" + +/ { + model = "GL.iNet GL-MT3000"; + compatible = "glinet,gl-mt3000", "mediatek,mt7981"; + + aliases { + led-boot = &led_lightblue; + led-failsafe = &led_lightblue; + led-running = &led_white; + led-upgrade = &led_lightblue; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + gpio-keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&pio 1 GPIO_ACTIVE_LOW>; + }; + + mode { + label = "mode"; + linux,input-type = ; + linux,code = ; + gpios = <&pio 0 GPIO_ACTIVE_HIGH>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_lightblue: led@0 { + label = "blue:run"; + gpios = <&pio 31 GPIO_ACTIVE_LOW>; + }; + + led_white: led@1 { + label = "white:system"; + gpios = <&pio 30 GPIO_ACTIVE_LOW>; + }; + }; + + fan_5v: regulator-fan-5v { + compatible = "regulator-fixed"; + regulator-name = "fan"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 28 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; + + usb_vbus: regulator-usb-vbus { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 12 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-boot-on; + }; +}; + +&uart0 { + status = "okay"; +}; + +&watchdog { + status = "okay"; +}; + +ð { + pinctrl-names = "default"; + pinctrl-0 = <&mdio_pins>; + + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + phy-mode = "2500base-x"; + phy-handle = <&phy0>; + nvmem-cells = <&macaddr>; + nvmem-cell-names = "mac-address"; + }; + + gmac1: mac@1 { + compatible = "mediatek,eth-mac"; + reg = <1>; + phy-mode = "gmii"; + phy-handle = <&int_gbe_phy>; + nvmem-cells = <&macaddr>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <1>; + }; +}; + +&mdio_bus { + reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>; + reset-delay-us = <600>; + reset-post-delay-us = <20000>; + + phy0: ethernet-phy@5 { + reg = <5>; + compatible = "ethernet-phy-ieee802.3-c45"; + phy-mode = "2500base-x"; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pins>; + + status = "okay"; +}; + +&fan { + pwms = <&pwm 0 40000 0>; + fan-supply = <&fan_5v>; + interrupt-parent = <&pio>; + interrupts = <29 IRQ_TYPE_EDGE_RISING>; + status = "okay"; +}; + +&spi0 { + pinctrl-names = "default"; + pinctrl-0 = <&spi0_flash_pins>; + status = "okay"; + + spi_nand: flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "spi-nand"; + reg = <0>; + spi-max-frequency = <52000000>; + + spi-cal-enable; + spi-cal-mode = "read-data"; + spi-cal-datalen = <7>; + spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>; + spi-cal-addrlen = <5>; + spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>; + + spi-tx-buswidth = <4>; + spi-rx-buswidth = <4>; + mediatek,nmbm; + mediatek,bmt-max-ratio = <1>; + mediatek,bmt-max-reserved-blocks = <64>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "BL2"; + reg = <0x00000 0x0100000>; + read-only; + }; + + partition@100000 { + label = "u-boot-env"; + reg = <0x0100000 0x0080000>; + }; + + factory: partition@180000 { + label = "Factory"; + reg = <0x180000 0x0200000>; + read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr: macaddr@a { + reg = <0xa 0x6>; + }; + }; + + partition@380000 { + label = "FIP"; + reg = <0x380000 0x0200000>; + read-only; + }; + + partition@580000 { + label = "log"; + reg = <0x580000 0x0040000>; + }; + + partition@5c0000 { + label = "ubi"; + reg = <0x5c0000 0xf640000>; + compatible = "linux,ubi"; + }; + }; + }; +}; + +&pio { + spi0_flash_pins: spi0-pins { + mux { + function = "spi"; + groups = "spi0", "spi0_wp_hold"; + }; + }; + + pwm_pins: pwm0-pins { + mux { + function = "pwm"; + groups = "pwm0_1"; + }; + }; +}; + +&usb_phy { + status = "okay"; +}; + +&xhci { + vbus-supply = <&usb_vbus>; + + status = "okay"; +}; + +&wifi { + mediatek,mtd-eeprom = <&factory 0x0>; + + status = "okay"; +}; -- cgit v1.2.3