From 9470160c350d15f765c33d6c1db15d6c4709a64c Mon Sep 17 00:00:00 2001 From: Richard Huynh Date: Wed, 1 Dec 2021 12:27:39 +1100 Subject: mediatek: Add support for Xiaomi Redmi Router AX6S Also known as the "Xiaomi Router AX3200" in western markets, but only the AX6S is widely installation-capable at this time. SoC: MediaTek MT7622B RAM: DDR3 256 MiB (ESMT M15T2G16128A) Flash: SPI-NAND 128 MiB (ESMT F50L1G41LB or Gigadevice GD5F1GQ5xExxG) WLAN: 2.4/5 GHz 4T4R 2.4 GHz: MediaTek MT7622B 5 GHz: MediaTek MT7915E Ethernet: 4x 10/100/1000 Mbps Switch: MediaTek MT7531B LEDs/Keys: 2/2 (Internet + System LED, Mesh button + Reset pin) UART: Marked J1 on board VCC RX GND TX, beginning from "1". 3.3v, 115200n8 Power: 12 VDC, 1.5 A Notes: U-Boot passes through the ethaddr from uboot-env partition, but also has been known to reset it to a generic mac address hardcoded in the bootloader. However, bdata is also populated with the ethernet mac addresses, but is also typically never written to. Thus this is used instead. Installation: 1. Flash stock Xiaomi "closed beta" image labelled 'miwifi_rb03_firmware_stable_1.2.7_closedbeta.bin'. (MD5: 5eedf1632ac97bb5a6bb072c08603ed7) 2. Calculate telnet password from serial number and login 3. Execute commands to prepare device nvram set ssh_en=1 nvram set uart_en=1 nvram set boot_wait=on nvram set flag_boot_success=1 nvram set flag_try_sys1_failed=0 nvram set flag_try_sys2_failed=0 nvram commit 4. Download and flash image On computer: python -m http.server On router: cd /tmp wget http://:8000/factory.bin mtd -r write factory.bin firmware Device should reboot at this point. Reverting to stock: Stock Xiaomi recovery tftp that accepts their signed images, with default ips of 192.168.31.1 + 192.168.31.100. Stock image should be renamed to tftp server ip in hex (Eg. C0A81F64.img) Triggered by holding reset pin on powerup. A simple implementation of this would be via dnsmasq's dhcp-boot option or using the vendor's (Windows only) recovery tool available on their website. Signed-off-by: Richard Huynh (cherry picked from commit 9f9477b2751231d57cdd8c227149b88c93491d93) --- .../dts/mt7622-xiaomi-redmi-router-ax6s.dts | 355 +++++++++++++++++++++ 1 file changed, 355 insertions(+) create mode 100644 target/linux/mediatek/dts/mt7622-xiaomi-redmi-router-ax6s.dts (limited to 'target/linux/mediatek/dts/mt7622-xiaomi-redmi-router-ax6s.dts') diff --git a/target/linux/mediatek/dts/mt7622-xiaomi-redmi-router-ax6s.dts b/target/linux/mediatek/dts/mt7622-xiaomi-redmi-router-ax6s.dts new file mode 100644 index 0000000000..933d2c9275 --- /dev/null +++ b/target/linux/mediatek/dts/mt7622-xiaomi-redmi-router-ax6s.dts @@ -0,0 +1,355 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "mt7622.dtsi" +#include "mt6380.dtsi" + +/ { + model = "Xiaomi Redmi Router AX6S"; + compatible = "xiaomi,redmi-router-ax6s", "mediatek,mt7622"; + + aliases { + serial0 = &uart0; + led-boot = &led_power_amber; + led-failsafe = &led_power_amber; + led-running = &led_power_blue; + led-upgrade = &led_power_blue; + }; + + chosen { + stdout-path = "serial0:115200n8"; + bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512"; + }; + + memory { + reg = <0 0x40000000 0 0x8000000>; + }; + + leds { + compatible = "gpio-leds"; + + led_power_blue: power_blue { + label = "blue:power"; + gpios = <&pio 18 GPIO_ACTIVE_LOW>; + }; + + led_power_amber: power_amber { + label = "amber:power"; + gpios = <&pio 17 GPIO_ACTIVE_LOW>; + }; + + led_net_blue: net_blue { + label = "blue:net"; + gpios = <&pio 01 GPIO_ACTIVE_LOW>; + }; + + led_net_amber: net_amber { + label = "amber:net"; + gpios = <&pio 16 GPIO_ACTIVE_LOW>; + }; + + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&pio 0 GPIO_ACTIVE_LOW>; + linux,code = ; + }; + + mesh { + label = "mesh"; + gpios = <&pio 102 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + }; + }; +}; + +&cpu0 { + proc-supply = <&mt6380_vcpu_reg>; + sram-supply = <&mt6380_vm_reg>; +}; + +&cpu1 { + proc-supply = <&mt6380_vcpu_reg>; + sram-supply = <&mt6380_vm_reg>; +}; + +&pio { + eth_pins: eth-pins { + mux { + function = "eth"; + groups = "mdc_mdio", "rgmii_via_gmac2"; + }; + }; + + pcie0_pins: pcie0-pins { + mux { + function = "pcie"; + groups = "pcie0_pad_perst", + "pcie0_1_waken", + "pcie0_1_clkreq"; + }; + }; + + pmic_bus_pins: pmic-bus-pins { + mux { + function = "pmic"; + groups = "pmic_bus"; + }; + }; + + pwm7_pins: pwm1-2-pins { + mux { + function = "pwm"; + groups = "pwm_ch7_2"; + }; + }; + + /* Serial NAND is shared pin with SPI-NOR */ + serial_nand_pins: serial-nand-pins { + mux { + function = "flash"; + groups = "snfi"; + }; + }; + + uart0_pins: uart0-pins { + mux { + function = "uart"; + groups = "uart0_0_tx_rx" ; + }; + }; + + watchdog_pins: watchdog-pins { + mux { + function = "watchdog"; + groups = "watchdog"; + }; + }; +}; + +ð { + pinctrl-names = "default"; + pinctrl-0 = <ð_pins>; + status = "okay"; + + gmac0: mac@0 { + compatible = "mediatek,eth-mac"; + reg = <0>; + + phy-connection-type = "2500base-x"; + + nvmem-cells = <&macaddr_factory_4>; + nvmem-cell-names = "mac-address"; + mac-address-increment = <(-1)>; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + + mdio-bus { + #address-cells = <1>; + #size-cells = <0>; + + switch@0 { + compatible = "mediatek,mt7531"; + reg = <0>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&pio>; + interrupts = <53 IRQ_TYPE_LEVEL_HIGH>; + reset-gpios = <&pio 54 GPIO_ACTIVE_HIGH>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + wan: port@1 { + reg = <1>; + label = "wan"; + }; + + port@2 { + reg = <2>; + label = "lan1"; + }; + + port@3 { + reg = <3>; + label = "lan2"; + }; + + port@4 { + reg = <4>; + label = "lan3"; + }; + + port@6 { + reg = <6>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "2500base-x"; + + fixed-link { + speed = <2500>; + full-duplex; + pause; + }; + }; + }; + }; + }; +}; + +&snand { + pinctrl-names = "default"; + pinctrl-0 = <&serial_nand_pins>; + status = "okay"; + + mediatek,bmt-v2; + mediatek,bmt-table-size = <0x1000>; + mediatek,bmt-remap-range = <0x0 0x6c0000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "Preloader"; + reg = <0x0 0x80000>; + read-only; + }; + + partition@80000 { + label = "ATF"; + reg = <0x80000 0x40000>; + read-only; + }; + + partition@c0000 { + label = "u-boot"; + reg = <0xc0000 0x80000>; + read-only; + }; + + partition@140000 { + label = "u-boot-env"; + reg = <0x140000 0x40000>; + }; + + partition@180000 { + label = "bdata"; + reg = <0x180000 0x40000>; + }; + + factory: partition@1c0000 { + label = "factory"; + reg = <0x1c0000 0x80000>; + read-only; + + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_factory_4: macaddr@4 { + reg = <0x4 0x6>; + }; + }; + + partition@240000 { + label = "crash"; + reg = <0x240000 0x40000>; + read-only; + }; + + partition@280000 { + label = "crash_log"; + reg = <0x280000 0x40000>; + read-only; + }; + + /* Shrunk and renamed from "firmware" + * as to not break luci size checks + */ + partition@2c0000 { + label = "kernel"; + compatible = "denx,fit"; + reg = <0x2c0000 0x400000>; + }; + + + /* ubi partition is the result of squashing + * consecutive stock partitions: + * - firmware (partially) + * - firmware1 + * - overlay + * - obr + */ + partition@6c0000 { + label = "ubi"; + reg = <0x6C0000 0x6f00000>; + }; + }; +}; + +&pcie0 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie0_pins>; + status = "okay"; +}; + +&slot0 { + status = "okay"; + + wifi@0,0 { + compatible = "mediatek,mt76"; + reg = <0x0000 0 0 0 0>; + mediatek,mtd-eeprom = <&factory 0x5000>; + ieee80211-freq-limit = <5000000 6000000>; + }; +}; + +&pwm { + pinctrl-names = "default"; + pinctrl-0 = <&pwm7_pins>; + status = "okay"; +}; + +&pwrap { + pinctrl-names = "default"; + pinctrl-0 = <&pmic_bus_pins>; + status = "okay"; +}; + +&rtc { + status = "disabled"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pins>; + status = "okay"; +}; + +&watchdog { + pinctrl-names = "default"; + pinctrl-0 = <&watchdog_pins>; + status = "okay"; +}; + +&wmac { + status = "okay"; + + mediatek,mtd-eeprom = <&factory 0x0>; +}; -- cgit v1.2.3