From ae8b3d1648d71e71beb2008c95ad22ab211c1234 Mon Sep 17 00:00:00 2001 From: Florian Fainelli Date: Tue, 13 Nov 2012 17:20:14 +0000 Subject: [malta] fix CBUS UART registration Signed-off-by: Florian Fainelli git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34191 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../patches-3.6/001-MIPS-fix-CBUS-UART-irq.patch | 39 ++++++++++++++++++++++ 1 file changed, 39 insertions(+) create mode 100644 target/linux/malta/patches-3.6/001-MIPS-fix-CBUS-UART-irq.patch (limited to 'target/linux/malta/patches-3.6/001-MIPS-fix-CBUS-UART-irq.patch') diff --git a/target/linux/malta/patches-3.6/001-MIPS-fix-CBUS-UART-irq.patch b/target/linux/malta/patches-3.6/001-MIPS-fix-CBUS-UART-irq.patch new file mode 100644 index 0000000000..93f93a79f2 --- /dev/null +++ b/target/linux/malta/patches-3.6/001-MIPS-fix-CBUS-UART-irq.patch @@ -0,0 +1,39 @@ +From 132a7253fe87b1f4d71aab5abee3108a793234db Mon Sep 17 00:00:00 2001 +From: Ralf Baechle +Date: Tue, 13 Nov 2012 10:41:50 +0100 +Subject: [PATCH] MIPS: Malta: Fix interupt number of CBUS UART. + +The CBUS UART's interrupt number was wrong conflicting with the interrupt +being tied to the Intel PIIX4. Since the PIIX4's interrupt is registered +before the CBUS UART which is not being used on most systems this would +not be noticed. + +Attempts to open the ttyS2 CBUS UART would result in: + +genirq: Flags mismatch irq 18. 00000000 (serial) vs. 00010000 (XT-PIC cascade) +serial_link_irq_chain: request failed: -16 for irq: 18 + +Qemu was written to match the kernel so will need to be fixed also. + +Signed-off-by: Ralf Baechle +(cherry picked from commit fe2ccd4dcebd3c5e264af1705bb9b659972418cc) +--- + arch/mips/mti-malta/malta-platform.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/mips/mti-malta/malta-platform.c b/arch/mips/mti-malta/malta-platform.c +index a8beca8..a906153 100644 +--- a/arch/mips/mti-malta/malta-platform.c ++++ b/arch/mips/mti-malta/malta-platform.c +@@ -47,7 +47,7 @@ static struct plat_serial8250_port uart8250_data[] = { + SMC_PORT(0x2F8, 3), + { + .mapbase = 0x1f000900, /* The CBUS UART */ +- .irq = MIPS_CPU_IRQ_BASE + 2, ++ .irq = MIPS_CPU_IRQ_BASE + MIPSCPU_INT_MB2, + .uartclk = 3686400, /* Twice the usual clk! */ + .iotype = UPIO_MEM32, + .flags = CBUS_UART_FLAGS, +-- +1.7.11.7 + -- cgit v1.2.3