From 39bf2aee0ed840ff6bb4838bc0a42aaddc36a4d3 Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Wed, 6 Apr 2022 00:46:27 +0200 Subject: kernel: bump 5.4 to 5.4.188 Added the new configuration options: CONFIG_HARDEN_BRANCH_HISTORY=y CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y Manually adapted: target/linux/generic/hack-5.4/220-gc_sections.patch Compile-tested: lantiq/xrx200, armvirt/64 Run-tested: lantiq/xrx200, armvirt/64 Signed-off-by: Hauke Mehrtens --- .../patches-5.4/814-qe-0005-QE-remove-PPCisms-for-QE.patch | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'target/linux/layerscape/patches-5.4/814-qe-0005-QE-remove-PPCisms-for-QE.patch') diff --git a/target/linux/layerscape/patches-5.4/814-qe-0005-QE-remove-PPCisms-for-QE.patch b/target/linux/layerscape/patches-5.4/814-qe-0005-QE-remove-PPCisms-for-QE.patch index 496cd3cacf..1d83b124d8 100644 --- a/target/linux/layerscape/patches-5.4/814-qe-0005-QE-remove-PPCisms-for-QE.patch +++ b/target/linux/layerscape/patches-5.4/814-qe-0005-QE-remove-PPCisms-for-QE.patch @@ -210,7 +210,7 @@ Signed-off-by: Zhao Qiang #undef DEBUG -@@ -57,16 +55,16 @@ void __par_io_config_pin(struct qe_pio_r +@@ -59,16 +57,16 @@ void __par_io_config_pin(struct qe_pio_r pin_mask1bit = (u32) (1 << (QE_PIO_PINS - (pin + 1))); /* Set open drain, if required */ @@ -232,7 +232,7 @@ Signed-off-by: Zhao Qiang /* get all bits mask for 2 bit per port */ pin_mask2bits = (u32) (0x3 << (QE_PIO_PINS - -@@ -78,34 +76,30 @@ void __par_io_config_pin(struct qe_pio_r +@@ -80,34 +78,30 @@ void __par_io_config_pin(struct qe_pio_r /* clear and set 2 bits mask */ if (pin > (QE_PIO_PINS / 2) - 1) { @@ -277,7 +277,7 @@ Signed-off-by: Zhao Qiang } } EXPORT_SYMBOL(__par_io_config_pin); -@@ -133,12 +127,12 @@ int par_io_data_set(u8 port, u8 pin, u8 +@@ -135,12 +129,12 @@ int par_io_data_set(u8 port, u8 pin, u8 /* calculate pin location */ pin_mask = (u32) (1 << (QE_PIO_PINS - 1 - pin)); -- cgit v1.2.3