From ad907e1c03a3a1a236f4836cee085d085f280c8d Mon Sep 17 00:00:00 2001 From: Yutang Jiang Date: Thu, 8 Dec 2016 00:07:42 +0800 Subject: layerscape: add 64b/32b target for ls1046ardb device Add support for NXP layerscape ls1046ardb 64b/32b Dev board. LS1046ARDB Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 512 Mbyte NAND flash * Two 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card * On-board 4G eMMC Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: * PCIe1 (SerDes2 Lane0) to miniPCIe slot * PCIe2 (SerDes2 Lane1) to x2 PCIe slot * PCIe3 (SerDes2 Lane2) to x4 PCIe slot * USB 3.0: one super speed USB 3.0 type A port, one Micro-AB port * UART: supports two UARTs up to 115200 bps for console Signed-off-by: Yutang Jiang --- ...130-ls1046a-sata-Add-LS1046A-sata-support.patch | 53 ++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 target/linux/layerscape/patches-4.4/8130-ls1046a-sata-Add-LS1046A-sata-support.patch (limited to 'target/linux/layerscape/patches-4.4/8130-ls1046a-sata-Add-LS1046A-sata-support.patch') diff --git a/target/linux/layerscape/patches-4.4/8130-ls1046a-sata-Add-LS1046A-sata-support.patch b/target/linux/layerscape/patches-4.4/8130-ls1046a-sata-Add-LS1046A-sata-support.patch new file mode 100644 index 0000000000..ea384e6bd9 --- /dev/null +++ b/target/linux/layerscape/patches-4.4/8130-ls1046a-sata-Add-LS1046A-sata-support.patch @@ -0,0 +1,53 @@ +From 5cd461cd17c3e27e5501e499d5d865b60ee58257 Mon Sep 17 00:00:00 2001 +From: Gong Qianyu +Date: Mon, 26 Sep 2016 12:29:24 +0800 +Subject: [PATCH 130/141] ls1046a/sata: Add LS1046A sata support + +Signed-off-by: Gong Qianyu +Integrated-by: Zhao Qiang +Integated-by: Yutang Jiang +--- + drivers/ata/ahci_qoriq.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/ata/ahci_qoriq.c ++++ b/drivers/ata/ahci_qoriq.c +@@ -40,11 +40,16 @@ + #define AHCI_PORT_PHY_5_CFG 0x192c96a4 + #define AHCI_PORT_TRANS_CFG 0x08000025 + ++/* for ls1046a */ ++#define LS1046A_PORT_PHY2 0x28184d1f ++#define LS1046A_PORT_PHY3 0x0e081509 ++ + #define SATA_ECC_DISABLE 0x00020000 + + enum ahci_qoriq_type { + AHCI_LS1021A, + AHCI_LS1043A, ++ AHCI_LS1046A, + AHCI_LS2080A, + }; + +@@ -57,6 +62,7 @@ struct ahci_qoriq_priv { + static const struct of_device_id ahci_qoriq_of_match[] = { + { .compatible = "fsl,ls1021a-ahci", .data = (void *)AHCI_LS1021A}, + { .compatible = "fsl,ls1043a-ahci", .data = (void *)AHCI_LS1043A}, ++ { .compatible = "fsl,ls1046a-ahci", .data = (void *)AHCI_LS1046A}, + { .compatible = "fsl,ls2080a-ahci", .data = (void *)AHCI_LS2080A}, + {}, + }; +@@ -158,6 +164,13 @@ static int ahci_qoriq_phy_init(struct ah + writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); + break; + ++ case AHCI_LS1046A: ++ writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); ++ writel(LS1046A_PORT_PHY2, reg_base + PORT_PHY2); ++ writel(LS1046A_PORT_PHY3, reg_base + PORT_PHY3); ++ writel(AHCI_PORT_TRANS_CFG, reg_base + PORT_TRANS); ++ break; ++ + case AHCI_LS1043A: + case AHCI_LS2080A: + writel(AHCI_PORT_PHY_1_CFG, reg_base + PORT_PHY1); -- cgit v1.2.3