From 19951bbf57da87093f7bde25bad41571fbdaf4d9 Mon Sep 17 00:00:00 2001 From: Yangbo Lu Date: Fri, 22 Sep 2017 15:57:12 +0800 Subject: layerscape: drop linux 4.4 support This patch is to drop linux 4.4 for layerscape. Signed-off-by: Yangbo Lu --- .../3231-arm-dts-ls1021a-share-all-MSIs.patch | 37 ---------------------- 1 file changed, 37 deletions(-) delete mode 100644 target/linux/layerscape/patches-4.4/3231-arm-dts-ls1021a-share-all-MSIs.patch (limited to 'target/linux/layerscape/patches-4.4/3231-arm-dts-ls1021a-share-all-MSIs.patch') diff --git a/target/linux/layerscape/patches-4.4/3231-arm-dts-ls1021a-share-all-MSIs.patch b/target/linux/layerscape/patches-4.4/3231-arm-dts-ls1021a-share-all-MSIs.patch deleted file mode 100644 index 09a61dd058..0000000000 --- a/target/linux/layerscape/patches-4.4/3231-arm-dts-ls1021a-share-all-MSIs.patch +++ /dev/null @@ -1,37 +0,0 @@ -From 190ae222ef6ded27021620afdc3f5a36861d3625 Mon Sep 17 00:00:00 2001 -From: Minghuan Lian -Date: Tue, 17 Jan 2017 17:32:38 +0800 -Subject: [PATCH 07/13] arm: dts: ls1021a: share all MSIs - -Cherry-pick patchwork patch. - -In order to maximize the use of MSI, a PCIe controller will share -all MSI controllers. The patch changes msi-parent to refer to all -MSI controller dts nodes. - -Signed-off-by: Minghuan Lian -Signed-off-by: Yangbo Lu ---- - arch/arm/boot/dts/ls1021a.dtsi | 4 ++-- - 1 file changed, 2 insertions(+), 2 deletions(-) - ---- a/arch/arm/boot/dts/ls1021a.dtsi -+++ b/arch/arm/boot/dts/ls1021a.dtsi -@@ -568,7 +568,7 @@ - bus-range = <0x0 0xff>; - ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ - 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ -- msi-parent = <&msi1>; -+ msi-parent = <&msi1>, <&msi2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, -@@ -591,7 +591,7 @@ - bus-range = <0x0 0xff>; - ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ - 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ -- msi-parent = <&msi2>; -+ msi-parent = <&msi1>, <&msi2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, -- cgit v1.2.3