From 84d489f64f3b382d5544e342f66d8806e94e85d3 Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Sun, 26 Jun 2016 14:45:12 +0200 Subject: kernel: update to version 4.4.14 Changelog: https://cdn.kernel.org/pub/linux/kernel/v4.x/ChangeLog-4.4.14 Some manual changes to target/linux/generic/patches-4.4/610- netfilter_match_bypass_default_checks.patch were needed. Signed-off-by: Hauke Mehrtens --- .../0028-NET-lantiq-various-etop-fixes.patch | 81 +++++++++++----------- 1 file changed, 41 insertions(+), 40 deletions(-) (limited to 'target/linux/lantiq/patches-4.4/0028-NET-lantiq-various-etop-fixes.patch') diff --git a/target/linux/lantiq/patches-4.4/0028-NET-lantiq-various-etop-fixes.patch b/target/linux/lantiq/patches-4.4/0028-NET-lantiq-various-etop-fixes.patch index a236da1efa..81eccf24bc 100644 --- a/target/linux/lantiq/patches-4.4/0028-NET-lantiq-various-etop-fixes.patch +++ b/target/linux/lantiq/patches-4.4/0028-NET-lantiq-various-etop-fixes.patch @@ -104,7 +104,7 @@ Signed-off-by: John Crispin + +#define PMAC_HD_CTL_AS (1 << 19) +#define PMAC_HD_CTL_RXSH (1 << 22) - ++ +/* Switch Enable (0=disable, 1=enable) */ +#define GCTL0_SE 0x80000000 +/* Disable MDIO auto polling (0=disable, 1=enable) */ @@ -124,7 +124,7 @@ Signed-off-by: John Crispin +#define MDIO_XR9_REG_OFFSET 0 +#define MDIO_XR9_ADDR_OFFSET 5 +#define MDIO_XR9_WR_OFFSET 16 -+ + +#define LTQ_DMA_ETOP ((of_machine_is_compatible("lantiq,ase")) ? \ + (INT_NUM_IM3_IRL0) : (INT_NUM_IM2_IRL0)) + @@ -333,8 +333,7 @@ Signed-off-by: John Crispin - ltq_pmu_enable(PMU_PPE); + clk_enable(priv->clk_ppe); - -- switch (priv->pldata->mii_mode) { ++ + if (of_machine_is_compatible("lantiq,ar9")) { + ltq_etop_gbit_init(dev); + /* force the etops link to the gbit to MII */ @@ -343,7 +342,8 @@ Signed-off-by: John Crispin + ltq_etop_w32_mask(MDIO_CFG_MASK, 0, LTQ_ETOP_MDIO_CFG); + ltq_etop_w32_mask(MAC_CFG_MASK, MAC_CFG_CGEN | MAC_CFG_DUPLEX | + MAC_CFG_SPEED | MAC_CFG_LINK, LTQ_ETOP_MAC_CFG); -+ + +- switch (priv->pldata->mii_mode) { + switch (mii_mode) { case PHY_INTERFACE_MODE_RMII: - ltq_etop_w32_mask(ETOP_MII_MASK, @@ -382,8 +382,7 @@ Signed-off-by: John Crispin - ltq_etop_w32(PPE32_CGEN, LQ_PPE32_ENET_MAC_CFG); + return 0; +} - -- ltq_dma_init_port(DMA_PORT_ETOP); ++ +static int +ltq_etop_dma_init(struct net_device *dev) +{ @@ -392,21 +391,14 @@ Signed-off-by: John Crispin + int rx = priv->rx_irq - LTQ_DMA_ETOP; + int err; + ltq_dma_init_port(DMA_PORT_ETOP); + - for (i = 0; i < MAX_DMA_CHAN; i++) { - int irq = LTQ_DMA_CH0_INT + i; - struct ltq_etop_chan *ch = &priv->ch[i]; -+ ltq_dma_init_port(DMA_PORT_ETOP); - +- - ch->idx = ch->dma.nr = i; -+ priv->txch.dma.nr = tx; -+ ltq_dma_alloc_tx(&priv->txch.dma); -+ err = request_irq(priv->tx_irq, ltq_etop_dma_irq, 0, "eth_tx", priv); -+ if (err) { -+ netdev_err(dev, "failed to allocate tx irq\n"); -+ goto err_out; -+ } -+ priv->txch.dma.irq = priv->tx_irq; - +- - if (IS_TX(i)) { - ltq_dma_alloc_tx(&ch->dma); - request_irq(irq, ltq_etop_dma_irq, 0, "etop_tx", priv); @@ -418,6 +410,15 @@ Signed-off-by: John Crispin - return -ENOMEM; - ch->dma.desc = 0; - request_irq(irq, ltq_etop_dma_irq, 0, "etop_rx", priv); ++ priv->txch.dma.nr = tx; ++ ltq_dma_alloc_tx(&priv->txch.dma); ++ err = request_irq(priv->tx_irq, ltq_etop_dma_irq, 0, "eth_tx", priv); ++ if (err) { ++ netdev_err(dev, "failed to allocate tx irq\n"); ++ goto err_out; ++ } ++ priv->txch.dma.irq = priv->tx_irq; ++ + priv->rxch.dma.nr = rx; + ltq_dma_alloc_rx(&priv->rxch.dma); + for (priv->rxch.dma.desc = 0; priv->rxch.dma.desc < LTQ_DESC_NUM; @@ -655,6 +656,12 @@ Signed-off-by: John Crispin - phy_stop(priv->phydev); - for (i = 0; i < MAX_DMA_CHAN; i++) { - struct ltq_etop_chan *ch = &priv->ch[i]; +- +- if (!IS_RX(i) && !IS_TX(i)) +- continue; +- napi_disable(&ch->napi); +- ltq_dma_close(&ch->dma); +- } + if (priv->phydev) + phy_stop(priv->phydev); + napi_disable(&priv->txch.napi); @@ -664,12 +671,7 @@ Signed-off-by: John Crispin + ltq_dma_close(&priv->txch.dma); + ltq_dma_close(&priv->rxch.dma); + spin_unlock_irqrestore(&priv->lock, flags); - -- if (!IS_RX(i) && !IS_TX(i)) -- continue; -- napi_disable(&ch->napi); -- ltq_dma_close(&ch->dma); -- } ++ return 0; } @@ -789,7 +791,7 @@ Signed-off-by: John Crispin res = platform_get_resource(pdev, IORESOURCE_MEM, 0); if (!res) { -@@ -733,31 +943,62 @@ ltq_etop_probe(struct platform_device *p +@@ -733,30 +943,61 @@ ltq_etop_probe(struct platform_device *p goto err_out; } @@ -823,19 +825,10 @@ Signed-off-by: John Crispin priv->pdev = pdev; - priv->pldata = dev_get_platdata(&pdev->dev); priv->netdev = dev; -- spin_lock_init(&priv->lock); + priv->tx_irq = irqres[0].start; + priv->rx_irq = irqres[1].start; + priv->mii_mode = of_get_phy_mode(pdev->dev.of_node); - -- for (i = 0; i < MAX_DMA_CHAN; i++) { -- if (IS_TX(i)) -- netif_napi_add(dev, &priv->ch[i].napi, -- ltq_etop_poll_tx, 8); -- else if (IS_RX(i)) -- netif_napi_add(dev, &priv->ch[i].napi, -- ltq_etop_poll_rx, 32); -- priv->ch[i].netdev = dev; ++ + mac = of_get_mac_address(pdev->dev.of_node); + if (mac) + memcpy(priv->mac, mac, ETH_ALEN); @@ -855,18 +848,26 @@ Signed-off-by: John Crispin + priv->clk_ephycgu = clk_get(&pdev->dev, "ephycgu"); + if (IS_ERR(priv->clk_ephycgu)) + return PTR_ERR(priv->clk_ephycgu); - } - -+ spin_lock_init(&priv->lock); ++ } + + spin_lock_init(&priv->lock); + +- for (i = 0; i < MAX_DMA_CHAN; i++) { +- if (IS_TX(i)) +- netif_napi_add(dev, &priv->ch[i].napi, +- ltq_etop_poll_tx, 8); +- else if (IS_RX(i)) +- netif_napi_add(dev, &priv->ch[i].napi, +- ltq_etop_poll_rx, 32); +- priv->ch[i].netdev = dev; +- } + netif_napi_add(dev, &priv->txch.napi, ltq_etop_poll_tx, 8); + netif_napi_add(dev, &priv->rxch.napi, ltq_etop_poll_rx, 32); + priv->txch.netdev = dev; + priv->rxch.netdev = dev; -+ + err = register_netdev(dev); if (err) - goto err_free; @@ -785,31 +1026,22 @@ ltq_etop_remove(struct platform_device * return 0; } -- cgit v1.2.3