From eee1b34ce688efcb824ea9ce08edfce7ec507599 Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Sun, 25 Nov 2018 19:35:16 +0100 Subject: lantiq: copy target to kernel 4.19 This just copies the files from the kernel 4.14 specific folders into the kernel 4.19 specific folder, no changes are done to the files in this commit. Signed-off-by: Hauke Mehrtens --- ...x200-add-gphy-clk-src-device-tree-binding.patch | 30 ++++++++++++++++++++++ 1 file changed, 30 insertions(+) create mode 100644 target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch (limited to 'target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch') diff --git a/target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch b/target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch new file mode 100644 index 0000000000..ae8efcfdc0 --- /dev/null +++ b/target/linux/lantiq/patches-4.19/0301-xrx200-add-gphy-clk-src-device-tree-binding.patch @@ -0,0 +1,30 @@ +--- a/arch/mips/lantiq/xway/sysctrl.c ++++ b/arch/mips/lantiq/xway/sysctrl.c +@@ -424,6 +424,20 @@ static void clkdev_add_clkout(void) + } + } + ++static void set_phy_clock_source(struct device_node *np_cgu) ++{ ++ u32 phy_clk_src, ifcc; ++ ++ if (!np_cgu) ++ return; ++ ++ if (of_property_read_u32(np_cgu, "lantiq,phy-clk-src", &phy_clk_src)) ++ return; ++ ++ ifcc = ltq_cgu_r32(ifccr) & ~(0x1c); ++ ltq_cgu_w32(ifcc | (phy_clk_src << 2), ifccr); ++} ++ + /* bring up all register ranges that we need for basic system control */ + void __init ltq_soc_init(void) + { +@@ -589,4 +603,6 @@ void __init ltq_soc_init(void) + clkdev_add_pmu("1e100400.serial", NULL, 1, 0, PMU_ASC0); + } + usb_set_clock(); ++ ++ set_phy_clock_source(np_cgu); + } -- cgit v1.2.3