From 9a495f6bbbcb294b9926f4ec32e5bbb339395d00 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Mon, 8 Dec 2014 12:04:25 +0000 Subject: kernel: refresh patches Signed-off-by: Felix Fietkau SVN-Revision: 43564 --- .../0001-MIPS-lantiq-add-pcie-driver.patch | 61 ++-------------------- 1 file changed, 3 insertions(+), 58 deletions(-) (limited to 'target/linux/lantiq/patches-3.14/0001-MIPS-lantiq-add-pcie-driver.patch') diff --git a/target/linux/lantiq/patches-3.14/0001-MIPS-lantiq-add-pcie-driver.patch b/target/linux/lantiq/patches-3.14/0001-MIPS-lantiq-add-pcie-driver.patch index 3b4ad037d0..35bc54879e 100644 --- a/target/linux/lantiq/patches-3.14/0001-MIPS-lantiq-add-pcie-driver.patch +++ b/target/linux/lantiq/patches-3.14/0001-MIPS-lantiq-add-pcie-driver.patch @@ -39,8 +39,6 @@ Signed-off-by: John Crispin create mode 100644 arch/mips/pci/ifxmips_pcie_vr9.h create mode 100644 arch/mips/pci/pcie-lantiq.h -diff --git a/arch/mips/lantiq/Kconfig b/arch/mips/lantiq/Kconfig -index c002191..1621b1d 100644 --- a/arch/mips/lantiq/Kconfig +++ b/arch/mips/lantiq/Kconfig @@ -17,6 +17,7 @@ config SOC_XWAY @@ -67,8 +65,6 @@ index c002191..1621b1d 100644 config XRX200_PHY_FW bool "XRX200 PHY firmware loader" depends on SOC_XWAY -diff --git a/arch/mips/lantiq/xway/sysctrl.c b/arch/mips/lantiq/xway/sysctrl.c -index 51804b1..510a387 100644 --- a/arch/mips/lantiq/xway/sysctrl.c +++ b/arch/mips/lantiq/xway/sysctrl.c @@ -377,6 +377,8 @@ void __init ltq_soc_init(void) @@ -80,11 +76,9 @@ index 51804b1..510a387 100644 } else if (of_machine_is_compatible("lantiq,ar9")) { clkdev_add_static(ltq_ar9_cpu_hz(), ltq_ar9_fpi_hz(), ltq_ar9_fpi_hz(), CLOCK_250M); -diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile -index 137f2a6..1e1726f 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile -@@ -42,6 +42,8 @@ obj-$(CONFIG_SNI_RM) += fixup-sni.o ops-sni.o +@@ -42,6 +42,8 @@ obj-$(CONFIG_SNI_RM) += fixup-sni.o ops obj-$(CONFIG_LANTIQ) += fixup-lantiq.o obj-$(CONFIG_PCI_LANTIQ) += pci-lantiq.o ops-lantiq.o obj-$(CONFIG_SOC_RT3883) += pci-rt3883.o @@ -93,9 +87,6 @@ index 137f2a6..1e1726f 100644 obj-$(CONFIG_TANBAC_TB0219) += fixup-tb0219.o obj-$(CONFIG_TANBAC_TB0226) += fixup-tb0226.o obj-$(CONFIG_TANBAC_TB0287) += fixup-tb0287.o -diff --git a/arch/mips/pci/fixup-lantiq-pcie.c b/arch/mips/pci/fixup-lantiq-pcie.c -new file mode 100644 -index 0000000..3325e24 --- /dev/null +++ b/arch/mips/pci/fixup-lantiq-pcie.c @@ -0,0 +1,82 @@ @@ -181,8 +172,6 @@ index 0000000..3325e24 + +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_LANTIQ, PCI_DEVICE_ID_LANTIQ_PCIE, + ifx_pcie_rc_class_early_fixup); -diff --git a/arch/mips/pci/fixup-lantiq.c b/arch/mips/pci/fixup-lantiq.c -index c2ce41e..c110c10 100644 --- a/arch/mips/pci/fixup-lantiq.c +++ b/arch/mips/pci/fixup-lantiq.c @@ -11,11 +11,12 @@ @@ -199,7 +188,7 @@ index c2ce41e..c110c10 100644 if (ltq_pci_plat_dev_init) return ltq_pci_plat_dev_init(dev); -@@ -25,5 +26,7 @@ int pcibios_plat_dev_init(struct pci_dev *dev) +@@ -25,5 +26,7 @@ int pcibios_plat_dev_init(struct pci_dev int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) { @@ -207,9 +196,6 @@ index c2ce41e..c110c10 100644 + return ltq_pci_map_irq(dev, slot, pin); return of_irq_parse_and_map_pci(dev, slot, pin); } -diff --git a/arch/mips/pci/ifxmips_pci_common.h b/arch/mips/pci/ifxmips_pci_common.h -new file mode 100644 -index 0000000..46f4cb2 --- /dev/null +++ b/arch/mips/pci/ifxmips_pci_common.h @@ -0,0 +1,57 @@ @@ -270,9 +256,6 @@ index 0000000..46f4cb2 + +#endif /* IFXMIPS_PCI_COMMON_H */ + -diff --git a/arch/mips/pci/ifxmips_pcie.c b/arch/mips/pci/ifxmips_pcie.c -new file mode 100644 -index 0000000..4128898 --- /dev/null +++ b/arch/mips/pci/ifxmips_pcie.c @@ -0,0 +1,1099 @@ @@ -1375,9 +1358,6 @@ index 0000000..4128898 +MODULE_SUPPORTED_DEVICE("Infineon builtin PCIe RC module"); +MODULE_DESCRIPTION("Infineon builtin PCIe RC driver"); + -diff --git a/arch/mips/pci/ifxmips_pcie.h b/arch/mips/pci/ifxmips_pcie.h -new file mode 100644 -index 0000000..c6f92f5 --- /dev/null +++ b/arch/mips/pci/ifxmips_pcie.h @@ -0,0 +1,135 @@ @@ -1516,9 +1496,6 @@ index 0000000..c6f92f5 + +#endif /* IFXMIPS_PCIE_H */ + -diff --git a/arch/mips/pci/ifxmips_pcie_ar10.h b/arch/mips/pci/ifxmips_pcie_ar10.h -new file mode 100644 -index 0000000..99ff463 --- /dev/null +++ b/arch/mips/pci/ifxmips_pcie_ar10.h @@ -0,0 +1,290 @@ @@ -1812,9 +1789,6 @@ index 0000000..99ff463 +} + +#endif /* IFXMIPS_PCIE_AR10_H */ -diff --git a/arch/mips/pci/ifxmips_pcie_msi.c b/arch/mips/pci/ifxmips_pcie_msi.c -new file mode 100644 -index 0000000..bffd6fa --- /dev/null +++ b/arch/mips/pci/ifxmips_pcie_msi.c @@ -0,0 +1,392 @@ @@ -2210,9 +2184,6 @@ index 0000000..bffd6fa +MODULE_SUPPORTED_DEVICE("Infineon PCIe IP builtin MSI PIC module"); +MODULE_DESCRIPTION("Infineon PCIe IP builtin MSI PIC driver"); + -diff --git a/arch/mips/pci/ifxmips_pcie_phy.c b/arch/mips/pci/ifxmips_pcie_phy.c -new file mode 100644 -index 0000000..f5b0f13 --- /dev/null +++ b/arch/mips/pci/ifxmips_pcie_phy.c @@ -0,0 +1,478 @@ @@ -2694,9 +2665,6 @@ index 0000000..f5b0f13 +#endif +} + -diff --git a/arch/mips/pci/ifxmips_pcie_pm.c b/arch/mips/pci/ifxmips_pcie_pm.c -new file mode 100644 -index 0000000..a10ecad --- /dev/null +++ b/arch/mips/pci/ifxmips_pcie_pm.c @@ -0,0 +1,176 @@ @@ -2876,9 +2844,6 @@ index 0000000..a10ecad + ifx_pmcu_unregister(&pmcuUnRegister); +} + -diff --git a/arch/mips/pci/ifxmips_pcie_pm.h b/arch/mips/pci/ifxmips_pcie_pm.h -new file mode 100644 -index 0000000..6ece20d --- /dev/null +++ b/arch/mips/pci/ifxmips_pcie_pm.h @@ -0,0 +1,36 @@ @@ -2918,9 +2883,6 @@ index 0000000..6ece20d + +#endif /* IFXMIPS_PCIE_PM_H */ + -diff --git a/arch/mips/pci/ifxmips_pcie_reg.h b/arch/mips/pci/ifxmips_pcie_reg.h -new file mode 100644 -index 0000000..e7e4b6c --- /dev/null +++ b/arch/mips/pci/ifxmips_pcie_reg.h @@ -0,0 +1,1001 @@ @@ -3925,9 +3887,6 @@ index 0000000..e7e4b6c + +#endif /* IFXMIPS_PCIE_REG_H */ + -diff --git a/arch/mips/pci/ifxmips_pcie_vr9.h b/arch/mips/pci/ifxmips_pcie_vr9.h -new file mode 100644 -index 0000000..57d9368 --- /dev/null +++ b/arch/mips/pci/ifxmips_pcie_vr9.h @@ -0,0 +1,271 @@ @@ -4202,8 +4161,6 @@ index 0000000..57d9368 + +#endif /* IFXMIPS_PCIE_VR9_H */ + -diff --git a/arch/mips/pci/pci.c b/arch/mips/pci/pci.c -index 1bf60b1..31ee19b 100644 --- a/arch/mips/pci/pci.c +++ b/arch/mips/pci/pci.c @@ -251,6 +251,31 @@ static int __init pcibios_init(void) @@ -4238,9 +4195,6 @@ index 1bf60b1..31ee19b 100644 static int pcibios_enable_resources(struct pci_dev *dev, int mask) { u16 cmd, old_cmd; -diff --git a/arch/mips/pci/pcie-lantiq.h b/arch/mips/pci/pcie-lantiq.h -new file mode 100644 -index 0000000..d877c23 --- /dev/null +++ b/arch/mips/pci/pcie-lantiq.h @@ -0,0 +1,1305 @@ @@ -5549,8 +5503,6 @@ index 0000000..d877c23 + +#endif /* IFXMIPS_PCIE_VR9_H */ + -diff --git a/drivers/pci/pcie/aer/Kconfig b/drivers/pci/pcie/aer/Kconfig -index 50e94e0..4bf848f 100644 --- a/drivers/pci/pcie/aer/Kconfig +++ b/drivers/pci/pcie/aer/Kconfig @@ -5,7 +5,7 @@ @@ -5562,11 +5514,9 @@ index 50e94e0..4bf848f 100644 help This enables PCI Express Root Port Advanced Error Reporting (AER) driver support. Error reporting messages sent to Root -diff --git a/include/linux/pci.h b/include/linux/pci.h -index 33aa2ca..f5e4a13 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h -@@ -1120,6 +1120,8 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), +@@ -1121,6 +1121,8 @@ void pci_walk_bus(struct pci_bus *top, i void *userdata); int pci_cfg_space_size(struct pci_dev *dev); unsigned char pci_bus_max_busnr(struct pci_bus *bus); @@ -5575,8 +5525,6 @@ index 33aa2ca..f5e4a13 100644 void pci_setup_bridge(struct pci_bus *bus); resource_size_t pcibios_window_alignment(struct pci_bus *bus, unsigned long type); -diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h -index 97fbecd..cb3bde3 100644 --- a/include/linux/pci_ids.h +++ b/include/linux/pci_ids.h @@ -1045,6 +1045,12 @@ @@ -5592,6 +5540,3 @@ index 97fbecd..cb3bde3 100644 #define PCI_VENDOR_ID_WINBOND 0x10ad #define PCI_DEVICE_ID_WINBOND_82C105 0x0105 #define PCI_DEVICE_ID_WINBOND_83C553 0x0565 --- -1.7.10.4 - -- cgit v1.2.3