From 3c0676911b4622631180782ba54d7ce157dad2cc Mon Sep 17 00:00:00 2001 From: John Audia Date: Thu, 9 Feb 2023 07:45:03 -0500 Subject: kernel: bump 5.15 to 5.15.93 All patches automatically rebased. Build system: x86_64 Build-tested: bcm2711/RPi4B, filogic/xiaomi_redmi-router-ax6000-ubootmod Run-tested: bcm2711/RPi4B, filogic/xiaomi_redmi-router-ax6000-ubootmod Signed-off-by: John Audia --- ...072-v6.0-phy-qcom-qmp-pcie-make-pipe-clock-rate-configurable.patch | 2 +- ...73-v6.0-phy-qcom-qmp-pcie-add-IPQ8074-PCIe-Gen3-QMP-PHY-supp.patch | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'target/linux/ipq807x') diff --git a/target/linux/ipq807x/patches-5.15/0072-v6.0-phy-qcom-qmp-pcie-make-pipe-clock-rate-configurable.patch b/target/linux/ipq807x/patches-5.15/0072-v6.0-phy-qcom-qmp-pcie-make-pipe-clock-rate-configurable.patch index fddc82ed35..667c0cf7c7 100644 --- a/target/linux/ipq807x/patches-5.15/0072-v6.0-phy-qcom-qmp-pcie-make-pipe-clock-rate-configurable.patch +++ b/target/linux/ipq807x/patches-5.15/0072-v6.0-phy-qcom-qmp-pcie-make-pipe-clock-rate-configurable.patch @@ -27,7 +27,7 @@ Signed-off-by: Vinod Koul /* true, if PCS block has no separate SW_RESET register */ bool no_pcs_sw_reset; }; -@@ -5138,8 +5141,15 @@ static int phy_pipe_clk_register(struct +@@ -5139,8 +5142,15 @@ static int phy_pipe_clk_register(struct init.ops = &clk_fixed_rate_ops; diff --git a/target/linux/ipq807x/patches-5.15/0073-v6.0-phy-qcom-qmp-pcie-add-IPQ8074-PCIe-Gen3-QMP-PHY-supp.patch b/target/linux/ipq807x/patches-5.15/0073-v6.0-phy-qcom-qmp-pcie-add-IPQ8074-PCIe-Gen3-QMP-PHY-supp.patch index c915619360..72aeef974e 100644 --- a/target/linux/ipq807x/patches-5.15/0073-v6.0-phy-qcom-qmp-pcie-add-IPQ8074-PCIe-Gen3-QMP-PHY-supp.patch +++ b/target/linux/ipq807x/patches-5.15/0073-v6.0-phy-qcom-qmp-pcie-add-IPQ8074-PCIe-Gen3-QMP-PHY-supp.patch @@ -151,7 +151,7 @@ Signed-off-by: Vinod Koul static const struct qmp_phy_init_tbl sdm845_qmp_pcie_serdes_tbl[] = { QMP_PHY_INIT_CFG(QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN, 0x14), QMP_PHY_INIT_CFG(QSERDES_V3_COM_CLK_SELECT, 0x30), -@@ -3167,6 +3294,36 @@ static const struct qmp_phy_cfg ipq8074_ +@@ -3168,6 +3295,36 @@ static const struct qmp_phy_cfg ipq8074_ .pwrdn_delay_max = 1005, /* us */ }; @@ -188,7 +188,7 @@ Signed-off-by: Vinod Koul static const struct qmp_phy_cfg ipq6018_pciephy_cfg = { .type = PHY_TYPE_PCIE, .nlanes = 1, -@@ -5543,6 +5700,9 @@ static const struct of_device_id qcom_qm +@@ -5571,6 +5728,9 @@ static const struct of_device_id qcom_qm .compatible = "qcom,ipq8074-qmp-pcie-phy", .data = &ipq8074_pciephy_cfg, }, { -- cgit v1.2.3