From d53be2a2e98129ecf32009893ec46b1ce644721a Mon Sep 17 00:00:00 2001 From: Ansuel Smith Date: Mon, 1 Mar 2021 00:58:57 +0100 Subject: ipq806x: copy kernel 5.4 patches to 5.10 Copy kernel 5.4 patches and config to 5.10 Signed-off-by: Ansuel Smith --- .../patches-5.10/082-ipq8064-dtsi-tweaks.patch | 130 +++++++++++++++++++++ 1 file changed, 130 insertions(+) create mode 100644 target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch (limited to 'target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch') diff --git a/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch b/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch new file mode 100644 index 0000000000..568ca5bb88 --- /dev/null +++ b/target/linux/ipq806x/patches-5.10/082-ipq8064-dtsi-tweaks.patch @@ -0,0 +1,130 @@ +--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi +@@ -20,7 +20,7 @@ + #address-cells = <1>; + #size-cells = <0>; + +- cpu@0 { ++ cpu0: cpu@0 { + compatible = "qcom,krait"; + enable-method = "qcom,kpss-acc-v1"; + device_type = "cpu"; +@@ -30,7 +30,7 @@ + qcom,saw = <&saw0>; + }; + +- cpu@1 { ++ cpu1: cpu@1 { + compatible = "qcom,krait"; + enable-method = "qcom,kpss-acc-v1"; + device_type = "cpu"; +@@ -67,7 +67,7 @@ + no-map; + }; + +- smem@41000000 { ++ smem: smem@41000000 { + reg = <0x41000000 0x200000>; + no-map; + }; +@@ -155,6 +155,7 @@ + function = "pcie3_rst"; + drive-strength = <12>; + bias-disable; ++ output-low; + }; + }; + +@@ -219,21 +220,23 @@ + acc0: clock-controller@2088000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02088000 0x1000>, <0x02008000 0x1000>; ++ clock-output-names = "acpu0_aux"; + }; + + acc1: clock-controller@2098000 { + compatible = "qcom,kpss-acc-v1"; + reg = <0x02098000 0x1000>, <0x02008000 0x1000>; ++ clock-output-names = "acpu1_aux"; + }; + + saw0: regulator@2089000 { +- compatible = "qcom,saw2"; ++ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon"; + reg = <0x02089000 0x1000>, <0x02009000 0x1000>; + regulator; + }; + + saw1: regulator@2099000 { +- compatible = "qcom,saw2"; ++ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon"; + reg = <0x02099000 0x1000>, <0x02009000 0x1000>; + regulator; + }; +@@ -251,7 +254,7 @@ + + syscon-tcsr = <&tcsr>; + +- serial@12490000 { ++ gsbi2_serial: serial@12490000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x12490000 0x1000>, + <0x12480000 0x1000>; +@@ -326,7 +329,7 @@ + + syscon-tcsr = <&tcsr>; + +- serial@1a240000 { ++ gsbi5_serial: serial@1a240000 { + compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm"; + reg = <0x1a240000 0x1000>, + <0x1a200000 0x1000>; +@@ -397,7 +400,7 @@ + status = "disabled"; + }; + +- sata@29000000 { ++ sata: sata@29000000 { + compatible = "qcom,ipq806x-ahci", "generic-ahci"; + reg = <0x29000000 0x180>; + +@@ -430,6 +433,7 @@ + reg = <0x00900000 0x4000>; + #clock-cells = <1>; + #reset-cells = <1>; ++ #power-domain-cells = <1>; + }; + + tcsr: syscon@1a400000 { +@@ -625,13 +629,13 @@ + qcom,ee = <0>; + }; + +- amba { +- compatible = "simple-bus"; ++ amba: amba { ++ compatible = "arm,amba-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + +- sdcc@12400000 { ++ sdcc1: sdcc@12400000 { + status = "disabled"; + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; +@@ -645,13 +649,12 @@ + non-removable; + cap-sd-highspeed; + cap-mmc-highspeed; +- mmc-ddr-1_8v; + vmmc-supply = <&vsdcc_fixed>; + dmas = <&sdcc1bam 2>, <&sdcc1bam 1>; + dma-names = "tx", "rx"; + }; + +- sdcc@12180000 { ++ sdcc3: sdcc@12180000 { + compatible = "arm,pl18x", "arm,primecell"; + arm,primecell-periphid = <0x00051180>; + status = "disabled"; -- cgit v1.2.3