From 1adf51702e94063fb058ce13226ec5a04d15cfd4 Mon Sep 17 00:00:00 2001 From: John Crispin Date: Mon, 13 Mar 2017 13:30:10 +0100 Subject: ipq806x: clean up patches, port missing patches from 4.4 Signed-off-by: John Crispin Signed-off-by: Felix Fietkau --- ...pq4019-Add-support-for-IPQ4019-DK04-board.patch | 258 +++++++++++++++++++++ 1 file changed, 258 insertions(+) create mode 100644 target/linux/ipq806x/patches-4.9/0026-dts-ipq4019-Add-support-for-IPQ4019-DK04-board.patch (limited to 'target/linux/ipq806x/patches-4.9/0026-dts-ipq4019-Add-support-for-IPQ4019-DK04-board.patch') diff --git a/target/linux/ipq806x/patches-4.9/0026-dts-ipq4019-Add-support-for-IPQ4019-DK04-board.patch b/target/linux/ipq806x/patches-4.9/0026-dts-ipq4019-Add-support-for-IPQ4019-DK04-board.patch new file mode 100644 index 0000000000..32c52b07ed --- /dev/null +++ b/target/linux/ipq806x/patches-4.9/0026-dts-ipq4019-Add-support-for-IPQ4019-DK04-board.patch @@ -0,0 +1,258 @@ +From ec3e465ecf3f7dd26f2e22170e4c5f4b9979df5d Mon Sep 17 00:00:00 2001 +From: Matthew McClintock +Date: Mon, 21 Mar 2016 15:55:21 -0500 +Subject: [PATCH 26/69] dts: ipq4019: Add support for IPQ4019 DK04 board + +This is pretty similiar to a DK01 but has a bit more IO. Some notable +differences are listed below however they are not in the device tree yet +as we continue adding more support + +- second serial port +- PCIe +- NAND +- SD/EMMC + +Signed-off-by: Matthew McClintock +--- + arch/arm/boot/dts/Makefile | 1 + + arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 12 +- + arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts | 21 +++ + arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi | 163 ++++++++++++++++++++++++ + 4 files changed, 189 insertions(+), 8 deletions(-) + create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts + create mode 100644 arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi + +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -617,6 +617,7 @@ dtb-$(CONFIG_ARCH_QCOM) += \ + qcom-apq8084-ifc6540.dtb \ + qcom-apq8084-mtp.dtb \ + qcom-ipq4019-ap.dk01.1-c1.dtb \ ++ qcom-ipq4019-ap.dk04.1-c1.dtb \ + qcom-ipq8064-ap148.dtb \ + qcom-msm8660-surf.dtb \ + qcom-msm8960-cdp.dtb \ +--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi ++++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi +@@ -109,11 +109,7 @@ + status = "ok"; + }; + +- usb3_ss_phy: ssphy@0 { +- status = "ok"; +- }; +- +- dummy_ss_phy: ssphy@1 { ++ usb3_ss_phy: ssphy@9a000 { + status = "ok"; + }; + +@@ -121,15 +117,15 @@ + status = "ok"; + }; + +- usb2_hs_phy: hsphy@a8000 { ++ usb3@0 { + status = "ok"; + }; + +- usb3: usb3@8a00000 { ++ usb2_hs_phy: hsphy@a8000 { + status = "ok"; + }; + +- usb2: usb2@6000000 { ++ usb2@0{ + status = "ok"; + }; + }; +--- /dev/null ++++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1-c1.dts +@@ -0,0 +1,21 @@ ++/* Copyright (c) 2015, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include "qcom-ipq4019-ap.dk04.1.dtsi" ++ ++/ { ++ model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK04.1-C1"; ++}; +--- /dev/null ++++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi +@@ -0,0 +1,163 @@ ++/* Copyright (c) 2015, The Linux Foundation. All rights reserved. ++ * ++ * Permission to use, copy, modify, and/or distribute this software for any ++ * purpose with or without fee is hereby granted, provided that the above ++ * copyright notice and this permission notice appear in all copies. ++ * ++ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ++ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ++ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ++ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ++ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ++ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ++ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ++ * ++ */ ++ ++#include "qcom-ipq4019.dtsi" ++ ++/ { ++ model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1"; ++ compatible = "qcom,ipq4019"; ++ ++ clocks { ++ xo: xo { ++ compatible = "fixed-clock"; ++ clock-frequency = <48000000>; ++ #clock-cells = <0>; ++ }; ++ }; ++ ++ soc { ++ timer { ++ compatible = "arm,armv7-timer"; ++ interrupts = <1 2 0xf08>, ++ <1 3 0xf08>, ++ <1 4 0xf08>, ++ <1 1 0xf08>; ++ clock-frequency = <48000000>; ++ }; ++ ++ pinctrl@0x01000000 { ++ serial_0_pins: serial_pinmux { ++ mux { ++ pins = "gpio16", "gpio17"; ++ function = "blsp_uart0"; ++ bias-disable; ++ }; ++ }; ++ ++ serial_1_pins: serial1_pinmux { ++ mux { ++ pins = "gpio8", "gpio9"; ++ function = "blsp_uart1"; ++ bias-disable; ++ }; ++ }; ++ ++ spi_0_pins: spi_0_pinmux { ++ pinmux { ++ function = "blsp_spi0"; ++ pins = "gpio13", "gpio14", "gpio15"; ++ }; ++ pinmux_cs { ++ function = "gpio"; ++ pins = "gpio12"; ++ }; ++ pinconf { ++ pins = "gpio13", "gpio14", "gpio15"; ++ drive-strength = <12>; ++ bias-disable; ++ }; ++ pinconf_cs { ++ pins = "gpio12"; ++ drive-strength = <2>; ++ bias-disable; ++ output-high; ++ }; ++ }; ++ ++ i2c_0_pins: i2c_0_pinmux { ++ pinmux { ++ function = "blsp_i2c0"; ++ pins = "gpio10", "gpio11"; ++ }; ++ pinconf { ++ pins = "gpio10", "gpio11"; ++ drive-strength = <16>; ++ bias-disable; ++ }; ++ }; ++ }; ++ ++ blsp_dma: dma@7884000 { ++ status = "ok"; ++ }; ++ ++ spi_0: spi@78b5000 { ++ pinctrl-0 = <&spi_0_pins>; ++ pinctrl-names = "default"; ++ status = "ok"; ++ cs-gpios = <&tlmm 12 0>; ++ ++ mx25l25635e@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ reg = <0>; ++ compatible = "mx25l25635e"; ++ spi-max-frequency = <24000000>; ++ }; ++ }; ++ ++ i2c_0: i2c@78b7000 { /* BLSP1 QUP2 */ ++ pinctrl-0 = <&i2c_0_pins>; ++ pinctrl-names = "default"; ++ ++ status = "ok"; ++ }; ++ ++ serial@78af000 { ++ pinctrl-0 = <&serial_0_pins>; ++ pinctrl-names = "default"; ++ status = "ok"; ++ }; ++ ++ serial@78b0000 { ++ pinctrl-0 = <&serial_1_pins>; ++ pinctrl-names = "default"; ++ status = "ok"; ++ }; ++ ++ usb3_ss_phy: ssphy@9a000 { ++ status = "ok"; ++ }; ++ ++ usb3_hs_phy: hsphy@a6000 { ++ status = "ok"; ++ }; ++ ++ usb3: usb3@0 { ++ status = "ok"; ++ }; ++ ++ usb2_hs_phy: hsphy@a8000 { ++ status = "ok"; ++ }; ++ ++ usb2: usb2@6000000 { ++ status = "ok"; ++ }; ++ ++ cryptobam: dma@8e04000 { ++ status = "ok"; ++ }; ++ ++ crypto@8e3a000 { ++ status = "ok"; ++ }; ++ ++ watchdog@b017000 { ++ status = "ok"; ++ }; ++ }; ++}; -- cgit v1.2.3