From 63066d3006958ca52df71f53c6f413ad4fb74974 Mon Sep 17 00:00:00 2001 From: Christian Lamparter Date: Thu, 28 Nov 2019 22:28:48 +0100 Subject: ipq806x: refresh 4.19 patches MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reworked: - 0034 patchset update Added: - 080 Add support for pinctrl-msm framework Removed: - 0074-ipq806x-usb-Control-USB-master-reset.patch (we now have a dedicated driver for qcom usb) - 0047-mtd-nand-Create-a-BBT-flag-to-access-bad-block-marke (merged upstream) - 310-msm-adhoc-bus-support (it looks like it was never actually used in any dts) Signed-off-by: Christian Lamparter Signed-off-by: Ansuel Smith [commit subject and description facelift, SoB fix] Signed-off-by: Petr Štetiar --- ...004-dt-bindings-clock-Document-qcom-hfpll.patch | 81 ++++++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 target/linux/ipq806x/patches-4.19/0034-0004-dt-bindings-clock-Document-qcom-hfpll.patch (limited to 'target/linux/ipq806x/patches-4.19/0034-0004-dt-bindings-clock-Document-qcom-hfpll.patch') diff --git a/target/linux/ipq806x/patches-4.19/0034-0004-dt-bindings-clock-Document-qcom-hfpll.patch b/target/linux/ipq806x/patches-4.19/0034-0004-dt-bindings-clock-Document-qcom-hfpll.patch new file mode 100644 index 0000000000..1db989f6d9 --- /dev/null +++ b/target/linux/ipq806x/patches-4.19/0034-0004-dt-bindings-clock-Document-qcom-hfpll.patch @@ -0,0 +1,81 @@ +From 1f924faa8b1e4789ecc06ed0dd58ca3487c89012 Mon Sep 17 00:00:00 2001 +From: Stephen Boyd +Date: Tue, 14 Aug 2018 17:42:23 +0530 +Subject: [PATCH 04/12] dt-bindings: clock: Document qcom,hfpll + +Adds bindings document for qcom,hfpll instantiated within +the Krait processor subsystem as separate register region. + +Reviewed-by: Rob Herring +Signed-off-by: Stephen Boyd +Signed-off-by: Sricharan R +Tested-by: Craig Tatlor +Signed-off-by: Stephen Boyd +--- + .../devicetree/bindings/clock/qcom,hfpll.txt | 60 +++++++++++++++++++ + 1 file changed, 60 insertions(+) + create mode 100644 Documentation/devicetree/bindings/clock/qcom,hfpll.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/clock/qcom,hfpll.txt +@@ -0,0 +1,60 @@ ++High-Frequency PLL (HFPLL) ++ ++PROPERTIES ++ ++- compatible: ++ Usage: required ++ Value type: : ++ shall contain only one of the following. The generic ++ compatible "qcom,hfpll" should be also included. ++ ++ "qcom,hfpll-ipq8064", "qcom,hfpll" ++ "qcom,hfpll-apq8064", "qcom,hfpll" ++ "qcom,hfpll-msm8974", "qcom,hfpll" ++ "qcom,hfpll-msm8960", "qcom,hfpll" ++ ++- reg: ++ Usage: required ++ Value type: ++ Definition: address and size of HPLL registers. An optional second ++ element specifies the address and size of the alias ++ register region. ++ ++- clocks: ++ Usage: required ++ Value type: ++ Definition: reference to the xo clock. ++ ++- clock-names: ++ Usage: required ++ Value type: ++ Definition: must be "xo". ++ ++- clock-output-names: ++ Usage: required ++ Value type: ++ Definition: Name of the PLL. Typically hfpllX where X is a CPU number ++ starting at 0. Otherwise hfpll_Y where Y is more specific ++ such as "l2". ++ ++Example: ++ ++1) An HFPLL for the L2 cache. ++ ++ clock-controller@f9016000 { ++ compatible = "qcom,hfpll-ipq8064", "qcom,hfpll"; ++ reg = <0xf9016000 0x30>; ++ clocks = <&xo_board>; ++ clock-names = "xo"; ++ clock-output-names = "hfpll_l2"; ++ }; ++ ++2) An HFPLL for CPU0. This HFPLL has the alias register region. ++ ++ clock-controller@f908a000 { ++ compatible = "qcom,hfpll-ipq8064", "qcom,hfpll"; ++ reg = <0xf908a000 0x30>, <0xf900a000 0x30>; ++ clocks = <&xo_board>; ++ clock-names = "xo"; ++ clock-output-names = "hfpll0"; ++ }; -- cgit v1.2.3