From 8e49b4b9029b6bdef052604094c47ca18ab3fefb Mon Sep 17 00:00:00 2001 From: John Crispin Date: Sat, 23 May 2015 15:28:02 +0000 Subject: ipq806x: add & enable cpufreq support This change set enables frequency scaling on ipq806x, which speeds-up the CPU and allows it to achieve its max frequency. These patches are cherry-picked & backported from the following location: *130-132: linux-next *133-143: LKML - https://lkml.org/lkml/2015/3/21/15 *144: derived from other qcom similar dts *145: derived from https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-3.14/drivers/cpufreq/cpufreq-krait.c Signed-off-by: Mathieu Olivari SVN-Revision: 45730 --- ...-set_parent-doing-the-wrong-thing-when-IN.patch | 60 ++++++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 target/linux/ipq806x/patches-3.18/130-clk_mux-Fix-set_parent-doing-the-wrong-thing-when-IN.patch (limited to 'target/linux/ipq806x/patches-3.18/130-clk_mux-Fix-set_parent-doing-the-wrong-thing-when-IN.patch') diff --git a/target/linux/ipq806x/patches-3.18/130-clk_mux-Fix-set_parent-doing-the-wrong-thing-when-IN.patch b/target/linux/ipq806x/patches-3.18/130-clk_mux-Fix-set_parent-doing-the-wrong-thing-when-IN.patch new file mode 100644 index 0000000000..d943ad511d --- /dev/null +++ b/target/linux/ipq806x/patches-3.18/130-clk_mux-Fix-set_parent-doing-the-wrong-thing-when-IN.patch @@ -0,0 +1,60 @@ +From 6793b3cd5da817c4be218bd8632f07cf4d2b0d26 Mon Sep 17 00:00:00 2001 +From: Hans de Goede +Date: Wed, 19 Nov 2014 14:48:59 +0100 +Subject: [PATCH] clk_mux: Fix set_parent doing the wrong thing when INDEX_BIT + && index >= 3 + +If CLK_MUX_INDEX_BIT is set, then each bit turns on / off a single parent, +so theoretically multiple parents could be enabled at the same time, but in +practice only one bit should ever be 1. So to select parent 0, set +the register (*) to 0x01, to select parent 1 set it 0x02, parent 2, 0x04, +parent 3, 0x08, etc. + +But the current code does: + + if (mux->flags & CLK_MUX_INDEX_BIT) + index = (1 << ffs(index)); + +Which means that: + +For an input index of 0, ffs returns 0, so we set the register +to 0x01, ok. + +For an input index of 1, ffs returns 1, so we set the register +to 0x02, ok. + +For an input index of 2, ffs returns 2, so we set the register +to 0x04, ok. + +For an input index of 3, ffs returns 1, so we set the register +to 0x02, not good! + +The code should simply be: + + if (mux->flags & CLK_MUX_INDEX_BIT) + index = 1 << index; + +Which always does the right thing, this commit fixes this. + +Signed-off-by: Hans de Goede +Signed-off-by: Michael Turquette +--- + drivers/clk/clk-mux.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c +index 4f96ff3..6e1ecf9 100644 +--- a/drivers/clk/clk-mux.c ++++ b/drivers/clk/clk-mux.c +@@ -77,7 +77,7 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index) + + else { + if (mux->flags & CLK_MUX_INDEX_BIT) +- index = (1 << ffs(index)); ++ index = 1 << index; + + if (mux->flags & CLK_MUX_INDEX_ONE) + index++; +-- +2.1.4 + -- cgit v1.2.3