From 272e0a702a2bcfb383c59051f37c87dcdbe844f5 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 14 Jan 2020 17:15:57 +0100
Subject: ipq40xx: add v5.4 support

Signed-off-by: John Crispin <john@phrozen.org>
---
 .../arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts   | 79 ++++++++++++++++++++++
 1 file changed, 79 insertions(+)
 create mode 100644 target/linux/ipq40xx/files-5.4/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts

(limited to 'target/linux/ipq40xx/files-5.4/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts')

diff --git a/target/linux/ipq40xx/files-5.4/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts b/target/linux/ipq40xx/files-5.4/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts
new file mode 100644
index 0000000000..63fbfb65c1
--- /dev/null
+++ b/target/linux/ipq40xx/files-5.4/arch/arm/boot/dts/qcom-ipq4019-u4019-32m.dts
@@ -0,0 +1,79 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+/dts-v1/;
+
+#include "qcom-ipq4019-u4019.dtsi"
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Unielec U4019 (32M)";
+	compatible = "unielec,u4019-32m","unielec,u4019","qcom,ipq4019";
+};
+
+&blsp1_spi1 {
+	pinctrl-0 = <&spi_0_pins>;
+	pinctrl-names = "default";
+	status = "okay";
+	cs-gpios = <&tlmm 12 GPIO_ACTIVE_LOW>;
+
+	flash@0 {
+		reg = <0>;
+		compatible = "jedec,spi-nor";
+		spi-max-frequency = <24000000>;
+		broken-flash-reset;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "0:SBL1";
+				reg = <0x0 0x40000>;
+				read-only;
+			};
+			partition@40000 {
+				label = "0:MIBIB";
+				reg = <0x40000 0x20000>;
+				read-only;
+			};
+			partition@60000 {
+				label = "0:QSEE";
+				reg = <0x60000 0x60000>;
+				read-only;
+			};
+			partition@c0000 {
+				label = "0:CDT";
+				reg = <0xc0000 0x10000>;
+				read-only;
+			};
+			partition@d0000 {
+				label = "0:DDRPARAMS";
+				reg = <0xd0000 0x10000>;
+				read-only;
+			};
+			partition@e0000 {
+				label = "0:APPSBLENV";
+				reg = <0xe0000 0x10000>;
+				read-only;
+			};
+			partition@f0000 {
+				label = "0:APPSBL";
+				reg = <0xf0000 0x80000>;
+				read-only;
+			};
+			partition@170000 {
+				label = "0:ART";
+				reg = <0x170000 0x10000>;
+				read-only;
+			};
+			partition@180000 {
+				compatible = "denx,fit";
+				label = "firmware";
+				reg = <0x180000 0x1e80000>;
+			};
+		};
+	};
+};
+
-- 
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