From 54b275c8ed3ad20c447fd46deec83384822ac79d Mon Sep 17 00:00:00 2001 From: John Crispin Date: Wed, 21 Feb 2018 20:40:50 +0100 Subject: ipq40xx: add target Signed-off-by: Christian Lamparter Signed-off-by: Mathias Kresin Signed-off-by: John Crispin --- .../arch/arm/boot/dts/qcom-ipq4019-bus.dtsi | 1142 ++++++++++++++++++++ 1 file changed, 1142 insertions(+) create mode 100644 target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi (limited to 'target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi') diff --git a/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi new file mode 100644 index 0000000000..169505973f --- /dev/null +++ b/target/linux/ipq40xx/files-4.14/arch/arm/boot/dts/qcom-ipq4019-bus.dtsi @@ -0,0 +1,1142 @@ +/* Copyright (c) 2015, The Linux Foundation. All rights reserved. + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + * + */ + +#include + +/ { + +soc { + ad_hoc_bus: ad-hoc-bus { + compatible = "qcom,msm-bus-device"; + reg = <0x580000 0x14000>, + <0x500000 0x11000>; + reg-names = "snoc-base", "pcnoc-base"; + + /*Buses*/ + + fab_pcnoc: fab-pcnoc { + cell-id = ; + label = "fab-pcnoc"; + qcom,fab-dev; + qcom,base-name = "pcnoc-base"; + qcom,bypass-qos-prg; + qcom,bus-type = <1>; + qcom,qos-off = <0x1000>; + qcom,base-offset = <0x0>; + clocks = <>; + }; + + fab_snoc: fab-snoc { + cell-id = ; + label = "fab-snoc"; + qcom,fab-dev; + qcom,base-name = "snoc-base"; + qcom,bypass-qos-prg; + qcom,bus-type = <1>; + qcom,qos-off = <0x80>; + qcom,base-offset = <0x0>; + clocks = <>; + }; + + /*Masters*/ + + mas_blsp_bam: mas-blsp-bam { + cell-id = ; + label = "mas-blsp-bam"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_0>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_usb2_bam: mas-usb2-bam { + cell-id = ; + label = "mas-usb2-bam"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <15>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_pcnoc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_adss_dma0: mas-adss-dma0 { + cell-id = ; + label = "mas-adss-dma0"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_adss_dma1: mas-adss-dma1 { + cell-id = ; + label = "mas-adss-dma1"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_adss_dma2: mas-adss-dma2 { + cell-id = ; + label = "mas-adss-dma2"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_adss_dma3: mas-adss-dma3 { + cell-id = ; + label = "mas-adss-dma3"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_qpic_bam: mas-qpic-bam { + cell-id = ; + label = "mas-qpic-bam"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_0>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_spdm: mas-spdm { + cell-id = ; + label = "mas-spdm"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_m_0>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_pcnoc_cfg: mas-pcnoc-cfg { + cell-id = ; + label = "mas-pcnoc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&slv_srvc_pcnoc>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + }; + + mas_tic: mas-tic { + cell-id = ; + label = "mas-tic"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_int_0 &slv_pcnoc_snoc>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + }; + + mas_sdcc_bam: mas-sdcc-bam { + cell-id = ; + label = "mas-sdcc-bam"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <14>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_pcnoc_snoc>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_tcsr &slv_mdio &slv_adss_cfg + &slv_fephy_cfg &slv_wss1_apu_cfg &slv_ddrc_mpu1_cfg + &slv_ddrc_mpu0_cfg &slv_qpic_cfg &slv_ddrc_cfg + &slv_pcnoc_cfg &slv_ess_apu_cfg &slv_imem_cfg + &slv_srif &slv_prng &slv_qdss_cfg + &slv_wss0_apu_cfg &slv_ddrc_apu_cfg &slv_gcnt + &slv_tlmm &slv_wss0_vmidmt_cfg &slv_prng_apu_cfg + &slv_boot_rom &slv_security &slv_spdm + &slv_pcnoc_mpu_cfg &slv_ddrc_mpu2_cfg &slv_ess_vmidmt_cfg + &slv_qhss_apu_cfg &slv_adss_vmidmt_cfg &slv_clk_ctl + &slv_adss_apu &slv_blsp_cfg &slv_usb2_cfg + &slv_srvc_pcnoc &slv_snoc_mpu_cfg &slv_wss1_vmidmt_cfg + &slv_sdcc_cfg &slv_snoc_cfg>; + }; + + mas_snoc_pcnoc: mas-snoc-pcnoc { + cell-id = ; + label = "mas-snoc-pcnoc"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <16>; + qcom,qos-mode = "fixed"; + qcom,connections = <&pcnoc_int_0>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + }; + + mas_qdss_dap: mas-qdss-dap { + cell-id = ; + label = "mas-qdss-dap"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&pcnoc_int_0 &slv_pcnoc_snoc>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + }; + + mas_ddrc_snoc: mas-ddrc-snoc { + cell-id = ; + label = "mas-ddrc-snoc"; + qcom,buswidth = <16>; + qcom,ap-owned; + qcom,connections = <&snoc_int_0 &snoc_int_1 + &slv_pcie>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_snoc_ddrc_m1 &slv_srvc_snoc>; + }; + + mas_wss_0: mas-wss-0 { + cell-id = ; + label = "mas-wss-0"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <26>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_pcie + &slv_wss1_cfg &slv_wss0_cfg &slv_crypto_cfg + &slv_srvc_snoc>; + }; + + mas_wss_1: mas-wss-1 { + cell-id = ; + label = "mas-wss-1"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <27>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_pcie + &slv_wss1_cfg &slv_wss0_cfg &slv_crypto_cfg + &slv_srvc_snoc>; + }; + + mas_crypto: mas-crypto { + cell-id = ; + label = "mas-crypto"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <5>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &snoc_int_1 + &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss + &slv_pcie &slv_qdss_stm &slv_crypto_cfg + &slv_srvc_snoc>; + }; + + mas_ess: mas-ess { + cell-id = ; + label = "mas-ess"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <44>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss + &slv_pcie &slv_qdss_stm &slv_wss1_cfg + &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; + }; + + mas_pcie: mas-pcie { + cell-id = ; + label = "mas-pcie"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <6>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_pcie + &slv_qdss_stm &slv_wss1_cfg &slv_wss0_cfg + &slv_crypto_cfg &slv_srvc_snoc>; + }; + + mas_usb3: mas-usb3 { + cell-id = ; + label = "mas-usb3"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <7>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss + &slv_pcie &slv_qdss_stm &slv_wss1_cfg + &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; + }; + + mas_qdss_etr: mas-qdss-etr { + cell-id = ; + label = "mas-qdss-etr"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,qport = <544>; + qcom,qos-mode = "fixed"; + qcom,connections = <&qdss_int>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss + &slv_pcie &slv_qdss_stm &slv_wss1_cfg + &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; + }; + + mas_qdss_bamndp: mas-qdss-bamndp { + cell-id = ; + label = "mas-qdss-bamndp"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <576>; + qcom,qos-mode = "fixed"; + qcom,connections = <&qdss_int>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_usb3_cfg &slv_ess_cfg &slv_a7ss + &slv_pcie &slv_qdss_stm &slv_wss1_cfg + &slv_wss0_cfg &slv_crypto_cfg &slv_srvc_snoc>; + }; + + mas_pcnoc_snoc: mas-pcnoc-snoc { + cell-id = ; + label = "mas-pcnoc-snoc"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <384>; + qcom,qos-mode = "fixed"; + qcom,connections = <&snoc_int_0 &snoc_int_1 + &slv_snoc_ddrc_m1>; + qcom,prio1 = <0>; + qcom,prio0 = <0>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,blacklist = <&slv_srvc_snoc>; + }; + + mas_snoc_cfg: mas-snoc-cfg { + cell-id = ; + label = "mas-snoc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&slv_srvc_snoc>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + }; + + /*Internal nodes*/ + + + pcnoc_m_0: pcnoc-m-0 { + cell-id = ; + label = "pcnoc-m-0"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <12>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_pcnoc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_m_1: pcnoc-m-1 { + cell-id = ; + label = "pcnoc-m-1"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,qport = <13>; + qcom,qos-mode = "fixed"; + qcom,connections = <&slv_pcnoc_snoc>; + qcom,prio1 = <1>; + qcom,prio0 = <1>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_int_0: pcnoc-int-0 { + cell-id = ; + label = "pcnoc-int-0"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,connections = < &pcnoc_s_1 &pcnoc_s_2 &pcnoc_s_0 + &pcnoc_s_4 &pcnoc_s_5 + &pcnoc_s_6 &pcnoc_s_7 + &pcnoc_s_8 &pcnoc_s_9 + &pcnoc_s_3>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_s_0: pcnoc-s-0 { + cell-id = ; + label = "pcnoc-s-0"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&slv_clk_ctl &slv_tcsr &slv_security + &slv_tlmm>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_s_1: pcnoc-s-1 { + cell-id = ; + label = "pcnoc-s-1"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_prng_apu_cfg &slv_prng&slv_imem_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_s_2: pcnoc-s-2 { + cell-id = ; + label = "pcnoc-s-2"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_spdm &slv_pcnoc_mpu_cfg &slv_pcnoc_cfg + &slv_boot_rom>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_s_3: pcnoc-s-3 { + cell-id = ; + label = "pcnoc-s-3"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_qdss_cfg&slv_gcnt &slv_snoc_cfg + &slv_snoc_mpu_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_s_4: pcnoc-s-4 { + cell-id = ; + label = "pcnoc-s-4"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&slv_adss_cfg &slv_adss_vmidmt_cfg &slv_adss_apu>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_s_5: pcnoc-s-5 { + cell-id = ; + label = "pcnoc-s-5"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = <&slv_qhss_apu_cfg &slv_fephy_cfg &slv_mdio + &slv_srif>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_s_6: pcnoc-s-6 { + cell-id = ; + label = "pcnoc-s-6"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_ddrc_mpu0_cfg &slv_ddrc_apu_cfg &slv_ddrc_mpu2_cfg + &slv_ddrc_cfg &slv_ddrc_mpu1_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_s_7: pcnoc-s-7 { + cell-id = ; + label = "pcnoc-s-7"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_ess_apu_cfg &slv_usb2_cfg&slv_ess_vmidmt_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_s_8: pcnoc-s-8 { + cell-id = ; + label = "pcnoc-s-8"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_sdcc_cfg &slv_qpic_cfg&slv_blsp_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + pcnoc_s_9: pcnoc-s-9 { + cell-id = ; + label = "pcnoc-s-9"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,connections = < &slv_wss1_apu_cfg &slv_wss1_vmidmt_cfg&slv_wss0_vmidmt_cfg + &slv_wss0_apu_cfg>; + qcom,bus-dev = <&fab_pcnoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + snoc_int_0: snoc-int-0 { + cell-id = ; + label = "snoc-int-0"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,connections = < &slv_ocimem&slv_qdss_stm>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + snoc_int_1: snoc-int-1 { + cell-id = ; + label = "snoc-int-1"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,connections = < &slv_crypto_cfg &slv_a7ss &slv_ess_cfg + &slv_usb3_cfg &slv_wss1_cfg + &slv_wss0_cfg>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + + qdss_int: qdss-int { + cell-id = ; + label = "qdss-int"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,connections = <&snoc_int_0 &slv_snoc_ddrc_m1>; + qcom,bus-dev = <&fab_snoc>; + qcom,mas-rpm-id = ; + qcom,slv-rpm-id = ; + }; + /*Slaves*/ + + slv_clk_ctl:slv-clk-ctl { + cell-id = ; + label = "slv-clk-ctl"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_security:slv-security { + cell-id = ; + label = "slv-security"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_tcsr:slv-tcsr { + cell-id = ; + label = "slv-tcsr"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_tlmm:slv-tlmm { + cell-id = ; + label = "slv-tlmm"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_imem_cfg:slv-imem-cfg { + cell-id = ; + label = "slv-imem-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_prng:slv-prng { + cell-id = ; + label = "slv-prng"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_prng_apu_cfg:slv-prng-apu-cfg { + cell-id = ; + label = "slv-prng-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_boot_rom:slv-boot-rom { + cell-id = ; + label = "slv-boot-rom"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_spdm:slv-spdm { + cell-id = ; + label = "slv-spdm"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_pcnoc_cfg:slv-pcnoc-cfg { + cell-id = ; + label = "slv-pcnoc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_pcnoc_mpu_cfg:slv-pcnoc-mpu-cfg { + cell-id = ; + label = "slv-pcnoc-mpu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_gcnt:slv-gcnt { + cell-id = ; + label = "slv-gcnt"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_qdss_cfg:slv-qdss-cfg { + cell-id = ; + label = "slv-qdss-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_snoc_cfg:slv-snoc-cfg { + cell-id = ; + label = "slv-snoc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_snoc_mpu_cfg:slv-snoc-mpu-cfg { + cell-id = ; + label = "slv-snoc-mpu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_adss_cfg:slv-adss-cfg { + cell-id = ; + label = "slv-adss-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_adss_apu:slv-adss-apu { + cell-id = ; + label = "slv-adss-apu"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_adss_vmidmt_cfg:slv-adss-vmidmt-cfg { + cell-id = ; + label = "slv-adss-vmidmt-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_qhss_apu_cfg:slv-qhss-apu-cfg { + cell-id = ; + label = "slv-qhss-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_mdio:slv-mdio { + cell-id = ; + label = "slv-mdio"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_fephy_cfg:slv-fephy-cfg { + cell-id = ; + label = "slv-fephy-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_srif:slv-srif { + cell-id = ; + label = "slv-srif"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_ddrc_cfg:slv-ddrc-cfg { + cell-id = ; + label = "slv-ddrc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_ddrc_apu_cfg:slv-ddrc-apu-cfg { + cell-id = ; + label = "slv-ddrc-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_ddrc_mpu0_cfg:slv-ddrc-mpu0-cfg { + cell-id = ; + label = "slv-ddrc-mpu0-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_ddrc_mpu1_cfg:slv-ddrc-mpu1-cfg { + cell-id = ; + label = "slv-ddrc-mpu1-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_ddrc_mpu2_cfg:slv-ddrc-mpu2-cfg { + cell-id = ; + label = "slv-ddrc-mpu2-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_ess_vmidmt_cfg:slv-ess-vmidmt-cfg { + cell-id = ; + label = "slv-ess-vmidmt-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_ess_apu_cfg:slv-ess-apu-cfg { + cell-id = ; + label = "slv-ess-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_usb2_cfg:slv-usb2-cfg { + cell-id = ; + label = "slv-usb2-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_blsp_cfg:slv-blsp-cfg { + cell-id = ; + label = "slv-blsp-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_qpic_cfg:slv-qpic-cfg { + cell-id = ; + label = "slv-qpic-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_sdcc_cfg:slv-sdcc-cfg { + cell-id = ; + label = "slv-sdcc-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_wss0_vmidmt_cfg:slv-wss0-vmidmt-cfg { + cell-id = ; + label = "slv-wss0-vmidmt-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_wss0_apu_cfg:slv-wss0-apu-cfg { + cell-id = ; + label = "slv-wss0-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_wss1_vmidmt_cfg:slv-wss1-vmidmt-cfg { + cell-id = ; + label = "slv-wss1-vmidmt-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_wss1_apu_cfg:slv-wss1-apu-cfg { + cell-id = ; + label = "slv-wss1-apu-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_pcnoc_snoc:slv-pcnoc-snoc { + cell-id = ; + label = "slv-pcnoc-snoc"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_srvc_pcnoc:slv-srvc-pcnoc { + cell-id = ; + label = "slv-srvc-pcnoc"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_pcnoc>; + qcom,slv-rpm-id = ; + }; + + slv_snoc_ddrc_m1:slv-snoc-ddrc-m1 { + cell-id = ; + label = "slv-snoc-ddrc-m1"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + + slv_a7ss:slv-a7ss { + cell-id = ; + label = "slv-a7ss"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + + slv_ocimem:slv-ocimem { + cell-id = ; + label = "slv-ocimem"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + + slv_wss0_cfg:slv-wss0-cfg { + cell-id = ; + label = "slv-wss0-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + + slv_wss1_cfg:slv-wss1-cfg { + cell-id = ; + label = "slv-wss1-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + + slv_pcie:slv-pcie { + cell-id = ; + label = "slv-pcie"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + + slv_usb3_cfg:slv-usb3-cfg { + cell-id = ; + label = "slv-usb3-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + + slv_crypto_cfg:slv-crypto-cfg { + cell-id = ; + label = "slv-crypto-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + + slv_ess_cfg:slv-ess-cfg { + cell-id = ; + label = "slv-ess-cfg"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + + slv_qdss_stm:slv-qdss-stm { + cell-id = ; + label = "slv-qdss-stm"; + qcom,buswidth = <4>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + + slv_srvc_snoc:slv-srvc-snoc { + cell-id = ; + label = "slv-srvc-snoc"; + qcom,buswidth = <8>; + qcom,ap-owned; + qcom,bus-dev = <&fab_snoc>; + qcom,slv-rpm-id = ; + }; + }; +}; + +}; -- cgit v1.2.3