From b10d6044599d8c1fa7fbb2374bcbf30118d39db1 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Sat, 24 Oct 2020 21:14:16 +0200 Subject: kernel: add linux 5.10 support Signed-off-by: Felix Fietkau --- .../735-net-phy-at803x-fix-at8033-sgmii-mode.patch | 51 ++++++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 target/linux/generic/pending-5.10/735-net-phy-at803x-fix-at8033-sgmii-mode.patch (limited to 'target/linux/generic/pending-5.10/735-net-phy-at803x-fix-at8033-sgmii-mode.patch') diff --git a/target/linux/generic/pending-5.10/735-net-phy-at803x-fix-at8033-sgmii-mode.patch b/target/linux/generic/pending-5.10/735-net-phy-at803x-fix-at8033-sgmii-mode.patch new file mode 100644 index 0000000000..b063b10251 --- /dev/null +++ b/target/linux/generic/pending-5.10/735-net-phy-at803x-fix-at8033-sgmii-mode.patch @@ -0,0 +1,51 @@ +From: Roman Yeryomin +Subject: kernel: add at803x fix for sgmii mode + +Some (possibly broken) bootloaders incorreclty initialize at8033 +phy. This patch enables sgmii autonegotiation mode. + +[john@phrozen.org: felix added this to his upstream queue] + +Signed-off-by: Roman Yeryomin +--- + drivers/net/phy/at803x.c | 25 +++++++++++++++++++++++++ + 1 file changed, 25 insertions(+) + +--- a/drivers/net/phy/at803x.c ++++ b/drivers/net/phy/at803x.c +@@ -76,6 +76,7 @@ + #define AT803X_LOC_MAC_ADDR_32_47_OFFSET 0x804A + #define AT803X_REG_CHIP_CONFIG 0x1f + #define AT803X_BT_BX_REG_SEL 0x8000 ++#define AT803X_SGMII_ANEG_EN 0x1000 + + #define AT803X_DEBUG_ADDR 0x1D + #define AT803X_DEBUG_DATA 0x1E +@@ -562,6 +563,27 @@ static int at8031_pll_config(struct phy_ + static int at803x_config_init(struct phy_device *phydev) + { + int ret; ++ u32 v; ++ ++ if (phydev->drv->phy_id == ATH8031_PHY_ID && ++ phydev->interface == PHY_INTERFACE_MODE_SGMII) ++ { ++ v = phy_read(phydev, AT803X_REG_CHIP_CONFIG); ++ /* select SGMII/fiber page */ ++ ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG, ++ v & ~AT803X_BT_BX_REG_SEL); ++ if (ret) ++ return ret; ++ /* enable SGMII autonegotiation */ ++ ret = phy_write(phydev, MII_BMCR, AT803X_SGMII_ANEG_EN); ++ if (ret) ++ return ret; ++ /* select copper page */ ++ ret = phy_write(phydev, AT803X_REG_CHIP_CONFIG, ++ v | AT803X_BT_BX_REG_SEL); ++ if (ret) ++ return ret; ++ } + + /* The RX and TX delay default is: + * after HW reset: RX delay enabled and TX delay disabled -- cgit v1.2.3