From 3c5635a3aa3dd00eb47cf0191588ed64f6d10f29 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Sun, 19 May 2013 18:36:15 +0000 Subject: kernel: generic: add 3.10-rc1 support Signed-off-by: Jonas Gorski git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36663 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../patches-3.10/304-mips_disable_fpu.patch | 206 +++++++++++++++++++++ 1 file changed, 206 insertions(+) create mode 100644 target/linux/generic/patches-3.10/304-mips_disable_fpu.patch (limited to 'target/linux/generic/patches-3.10/304-mips_disable_fpu.patch') diff --git a/target/linux/generic/patches-3.10/304-mips_disable_fpu.patch b/target/linux/generic/patches-3.10/304-mips_disable_fpu.patch new file mode 100644 index 0000000000..c540ba0f7d --- /dev/null +++ b/target/linux/generic/patches-3.10/304-mips_disable_fpu.patch @@ -0,0 +1,206 @@ +MIPS: allow disabling the kernel FPU emulator + +This patch allows turning off the in-kernel Algorithmics +FPU emulator support, which allows one to save a couple of +precious blocks on an embedded system. + +Signed-off-by: Florian Fainelli +-- +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -976,6 +976,17 @@ config I8259 + config MIPS_BONITO64 + bool + ++config MIPS_FPU_EMU ++ bool "Enable FPU emulation" ++ default y ++ help ++ This option allows building a kernel with or without the Algorithmics ++ FPU emulator enabled. Turning off this option results in a kernel which ++ does not catch floating operations exceptions. Make sure that your toolchain ++ is configured to enable software floating point emulation in that case. ++ ++ If unsure say Y here. ++ + config MIPS_MSC + bool + +--- a/arch/mips/math-emu/Makefile ++++ b/arch/mips/math-emu/Makefile +@@ -2,10 +2,11 @@ + # Makefile for the Linux/MIPS kernel FPU emulation. + # + +-obj-y := cp1emu.o ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \ ++obj-y := kernel_linkage.o dsemul.o cp1emu.o ++obj-$(CONFIG_MIPS_FPU_EMU) += ieee754m.o ieee754d.o ieee754dp.o ieee754sp.o ieee754.o \ + ieee754xcpt.o dp_frexp.o dp_modf.o dp_div.o dp_mul.o dp_sub.o \ + dp_add.o dp_fsp.o dp_cmp.o dp_logb.o dp_scalb.o dp_simple.o \ + dp_tint.o dp_fint.o dp_tlong.o dp_flong.o sp_frexp.o sp_modf.o \ + sp_div.o sp_mul.o sp_sub.o sp_add.o sp_fdp.o sp_cmp.o sp_logb.o \ + sp_scalb.o sp_simple.o sp_tint.o sp_fint.o sp_tlong.o sp_flong.o \ +- dp_sqrt.o sp_sqrt.o kernel_linkage.o dsemul.o ++ dp_sqrt.o sp_sqrt.o +--- a/arch/mips/math-emu/cp1emu.c ++++ b/arch/mips/math-emu/cp1emu.c +@@ -59,7 +59,11 @@ + #define __mips 4 + + /* Function which emulates a floating point instruction. */ ++#ifdef CONFIG_DEBUG_FS ++DEFINE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats); ++#endif + ++#ifdef CONFIG_MIPS_FPU_EMU + static int fpu_emu(struct pt_regs *, struct mips_fpu_struct *, + mips_instruction); + +@@ -70,10 +74,6 @@ static int fpux_emu(struct pt_regs *, + + /* Further private data for which no space exists in mips_fpu_struct */ + +-#ifdef CONFIG_DEBUG_FS +-DEFINE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats); +-#endif +- + /* Control registers */ + + #define FPCREG_RID 0 /* $0 = revision id */ +@@ -82,11 +82,15 @@ DEFINE_PER_CPU(struct mips_fpu_emulator_ + /* Determine rounding mode from the RM bits of the FCSR */ + #define modeindex(v) ((v) & FPU_CSR_RM) + ++#endif /* CONFIG_MIPS_FPU_EMU */ ++ + /* microMIPS bitfields */ + #define MM_POOL32A_MINOR_MASK 0x3f + #define MM_POOL32A_MINOR_SHIFT 0x6 + #define MM_MIPS32_COND_FC 0x30 + ++#ifdef CONFIG_MIPS_FPU_EMU ++ + /* Convert Mips rounding mode (0..3) to IEEE library modes. */ + static const unsigned char ieee_rm[4] = { + [FPU_CSR_RN] = IEEE754_RN, +@@ -116,9 +120,13 @@ static const unsigned int fpucondbit[8] + }; + #endif + ++#endif /* CONFIG_MIPS_FPU_EMU */ ++ + /* (microMIPS) Convert 16-bit register encoding to 32-bit register encoding. */ + static const unsigned int reg16to32map[8] = {16, 17, 2, 3, 4, 5, 6, 7}; + ++#ifdef CONFIG_MIPS_FPU_EMU ++ + /* (microMIPS) Convert certain microMIPS instructions to MIPS32 format. */ + static const int sd_format[] = {16, 17, 0, 0, 0, 0, 0, 0}; + static const int sdps_format[] = {16, 17, 22, 0, 0, 0, 0, 0}; +@@ -463,6 +471,8 @@ static int microMIPS32_to_MIPS32(union m + return 0; + } + ++#endif /* CONFIG_MIPS_FPU_EMU */ ++ + int mm_isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn, + unsigned long *contpc) + { +@@ -667,6 +677,8 @@ int mm_isBranchInstr(struct pt_regs *reg + return 0; + } + ++#ifdef CONFIG_MIPS_FPU_EMU ++ + /* + * Redundant with logic already in kernel/branch.c, + * embedded in compute_return_epc. At some point, +@@ -2102,7 +2114,6 @@ int fpu_emulator_cop1Handler(struct pt_r + + return sig; + } +- + #ifdef CONFIG_DEBUG_FS + + static int fpuemu_stat_get(void *data, u64 *val) +@@ -2151,4 +2162,11 @@ static int __init debugfs_fpuemu(void) + return 0; + } + __initcall(debugfs_fpuemu); +-#endif ++#endif /* CONFIG_DEBUGFS */ ++#else ++int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx, ++ int has_fpu, void *__user *fault_addr) ++{ ++ return 0; ++} ++#endif /* CONFIG_MIPS_FPU_EMU */ +--- a/arch/mips/math-emu/dsemul.c ++++ b/arch/mips/math-emu/dsemul.c +@@ -119,6 +119,7 @@ int mips_dsemul(struct pt_regs *regs, mi + return SIGILL; /* force out of emulation loop */ + } + ++#ifdef CONFIG_MIPS_FPU_EMU + int do_dsemulret(struct pt_regs *xcp) + { + struct emuframe __user *fr; +@@ -182,3 +183,9 @@ int do_dsemulret(struct pt_regs *xcp) + + return 1; + } ++#else ++int do_dsemulret(struct pt_regs *xcp) ++{ ++ return 0; ++} ++#endif /* CONFIG_MIPS_FPU_EMU */ +--- a/arch/mips/math-emu/kernel_linkage.c ++++ b/arch/mips/math-emu/kernel_linkage.c +@@ -29,6 +29,7 @@ + + #define SIGNALLING_NAN 0x7ff800007ff80000LL + ++#ifdef CONFIG_MIPS_FPU_EMU + void fpu_emulator_init_fpu(void) + { + static int first = 1; +@@ -112,4 +113,36 @@ int fpu_emulator_restore_context32(struc + + return err; + } +-#endif ++#endif /* CONFIG_64BIT */ ++#else ++ ++void fpu_emulator_init_fpu(void) ++{ ++ printk(KERN_INFO "FPU emulator disabled, make sure your toolchain" ++ "was compiled with software floating point support (soft-float)\n"); ++ return; ++} ++ ++int fpu_emulator_save_context(struct sigcontext __user *sc) ++{ ++ return 0; ++} ++ ++int fpu_emulator_restore_context(struct sigcontext __user *sc) ++{ ++ return 0; ++} ++ ++int fpu_emulator_save_context32(struct sigcontext32 __user *sc) ++{ ++ return 0; ++} ++ ++int fpu_emulator_restore_context32(struct sigcontext32 __user *sc) ++{ ++ return 0; ++} ++ ++#ifdef CONFIG_64BIT ++#endif /* CONFIG_64BIT */ ++#endif /* CONFIG_MIPS_FPU_EMU */ -- cgit v1.2.3