From e430c864f45e1f437c96a1e8a416e8b32edf5598 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Tue, 7 Feb 2012 11:28:06 +0000 Subject: kernel: add a recent upstream commit (post-3.3) to the ssb update patch, required for the next mac80211 update SVN-Revision: 30345 --- .../generic/patches-2.6.39/020-ssb_update.patch | 135 +++++++++++++++++++-- 1 file changed, 122 insertions(+), 13 deletions(-) (limited to 'target/linux/generic/patches-2.6.39') diff --git a/target/linux/generic/patches-2.6.39/020-ssb_update.patch b/target/linux/generic/patches-2.6.39/020-ssb_update.patch index be7071b93f..8113bca68f 100644 --- a/target/linux/generic/patches-2.6.39/020-ssb_update.patch +++ b/target/linux/generic/patches-2.6.39/020-ssb_update.patch @@ -787,10 +787,57 @@ * Copyright (C) 2005 Martin Langer * Copyright (C) 2005 Stefano Brivio * Copyright (C) 2005 Danny van Dyk -@@ -607,6 +607,29 @@ static void sprom_extract_r8(struct ssb_ +@@ -523,7 +523,13 @@ static void sprom_extract_r45(struct ssb + static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in) + { + int i; +- u16 v; ++ u16 v, o; ++ u16 pwr_info_offset[] = { ++ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1, ++ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3 ++ }; ++ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) != ++ ARRAY_SIZE(out->core_pwr_info)); + + /* extract the MAC address */ + for (i = 0; i < 3; i++) { +@@ -607,6 +613,61 @@ static void sprom_extract_r8(struct ssb_ memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24, sizeof(out->antenna_gain.ghz5)); ++ /* Extract cores power info info */ ++ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) { ++ o = pwr_info_offset[i]; ++ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI, ++ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT); ++ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI, ++ SSB_SPROM8_2G_MAXP, 0); ++ ++ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0); ++ ++ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI, ++ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT); ++ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI, ++ SSB_SPROM8_5G_MAXP, 0); ++ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP, ++ SSB_SPROM8_5GH_MAXP, 0); ++ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP, ++ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT); ++ ++ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0); ++ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0); ++ } ++ + /* Extract FEM info */ + SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G, + SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); @@ -817,7 +864,7 @@ sprom_extract_r458(out, in); /* TODO - get remaining rev 8 stuff needed */ -@@ -662,7 +685,6 @@ static int sprom_extract(struct ssb_bus +@@ -662,7 +723,6 @@ static int sprom_extract(struct ssb_bus static int ssb_pci_sprom_get(struct ssb_bus *bus, struct ssb_sprom *sprom) { @@ -825,7 +872,7 @@ int err; u16 *buf; -@@ -707,10 +729,17 @@ static int ssb_pci_sprom_get(struct ssb_ +@@ -707,10 +767,17 @@ static int ssb_pci_sprom_get(struct ssb_ if (err) { /* All CRC attempts failed. * Maybe there is no SPROM on the device? @@ -847,7 +894,7 @@ err = 0; goto out_free; } -@@ -728,12 +757,9 @@ out_free: +@@ -728,12 +795,9 @@ out_free: static void ssb_pci_get_boardinfo(struct ssb_bus *bus, struct ssb_boardinfo *bi) { @@ -1024,7 +1071,20 @@ /* core.c */ --- a/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h -@@ -25,8 +25,10 @@ struct ssb_sprom { +@@ -16,6 +16,12 @@ struct pcmcia_device; + struct ssb_bus; + struct ssb_driver; + ++struct ssb_sprom_core_pwr_info { ++ u8 itssi_2g, itssi_5g; ++ u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh; ++ u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3]; ++}; ++ + struct ssb_sprom { + u8 revision; + u8 il0mac[6]; /* MAC address for 802.11b/g */ +@@ -25,8 +31,10 @@ struct ssb_sprom { u8 et1phyaddr; /* MII address for enet1 */ u8 et0mdcport; /* MDIO for enet0 */ u8 et1mdcport; /* MDIO for enet1 */ @@ -1036,7 +1096,16 @@ u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */ u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */ u16 pa0b0; -@@ -92,6 +94,15 @@ struct ssb_sprom { +@@ -80,6 +88,8 @@ struct ssb_sprom { + u16 boardflags2_hi; /* Board flags (bits 48-63) */ + /* TODO store board flags in a single u64 */ + ++ struct ssb_sprom_core_pwr_info core_pwr_info[4]; ++ + /* Antenna gain values for up to 4 antennas + * on each band. Values in dBm/4 (Q5.2). Negative gain means the + * loss in the connectors is bigger than the gain. */ +@@ -92,6 +102,15 @@ struct ssb_sprom { } ghz5; /* 5GHz band */ } antenna_gain; @@ -1052,7 +1121,7 @@ /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */ }; -@@ -99,7 +110,7 @@ struct ssb_sprom { +@@ -99,7 +118,7 @@ struct ssb_sprom { struct ssb_boardinfo { u16 vendor; u16 type; @@ -1061,7 +1130,7 @@ }; -@@ -229,10 +240,9 @@ struct ssb_driver { +@@ -229,10 +248,9 @@ struct ssb_driver { #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv) extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner); @@ -1075,7 +1144,7 @@ extern void ssb_driver_unregister(struct ssb_driver *drv); -@@ -308,7 +318,7 @@ struct ssb_bus { +@@ -308,7 +326,7 @@ struct ssb_bus { /* ID information about the Chip. */ u16 chip_id; @@ -1084,7 +1153,7 @@ u16 sprom_offset; u16 sprom_size; /* number of words in sprom */ u8 chip_package; -@@ -404,7 +414,9 @@ extern bool ssb_is_sprom_available(struc +@@ -404,7 +422,9 @@ extern bool ssb_is_sprom_available(struc /* Set a fallback SPROM. * See kdoc at the function definition for complete documentation. */ @@ -1095,7 +1164,7 @@ /* Suspend a SSB bus. * Call this from the parent bus suspend routine. */ -@@ -518,6 +530,7 @@ extern int ssb_bus_may_powerdown(struct +@@ -518,6 +538,7 @@ extern int ssb_bus_may_powerdown(struct * Otherwise static always-on powercontrol will be used. */ extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl); @@ -1157,7 +1226,7 @@ #define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */ #define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */ #define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */ -@@ -432,6 +432,23 @@ +@@ -432,6 +432,56 @@ #define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */ #define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */ #define SSB_SPROM8_RXPO5G_SHIFT 8 @@ -1178,10 +1247,50 @@ +#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6 +#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8 +#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA ++ ++/* There are 4 blocks with power info sharing the same layout */ ++#define SSB_SROM8_PWR_INFO_CORE0 0x00C0 ++#define SSB_SROM8_PWR_INFO_CORE1 0x00E0 ++#define SSB_SROM8_PWR_INFO_CORE2 0x0100 ++#define SSB_SROM8_PWR_INFO_CORE3 0x0120 ++ ++#define SSB_SROM8_2G_MAXP_ITSSI 0x00 ++#define SSB_SPROM8_2G_MAXP 0x00FF ++#define SSB_SPROM8_2G_ITSSI 0xFF00 ++#define SSB_SPROM8_2G_ITSSI_SHIFT 8 ++#define SSB_SROM8_2G_PA_0 0x02 /* 2GHz power amp settings */ ++#define SSB_SROM8_2G_PA_1 0x04 ++#define SSB_SROM8_2G_PA_2 0x06 ++#define SSB_SROM8_5G_MAXP_ITSSI 0x08 /* 5GHz ITSSI and 5.3GHz Max Power */ ++#define SSB_SPROM8_5G_MAXP 0x00FF ++#define SSB_SPROM8_5G_ITSSI 0xFF00 ++#define SSB_SPROM8_5G_ITSSI_SHIFT 8 ++#define SSB_SPROM8_5GHL_MAXP 0x0A /* 5.2GHz and 5.8GHz Max Power */ ++#define SSB_SPROM8_5GH_MAXP 0x00FF ++#define SSB_SPROM8_5GL_MAXP 0xFF00 ++#define SSB_SPROM8_5GL_MAXP_SHIFT 8 ++#define SSB_SROM8_5G_PA_0 0x0C /* 5.3GHz power amp settings */ ++#define SSB_SROM8_5G_PA_1 0x0E ++#define SSB_SROM8_5G_PA_2 0x10 ++#define SSB_SROM8_5GL_PA_0 0x12 /* 5.2GHz power amp settings */ ++#define SSB_SROM8_5GL_PA_1 0x14 ++#define SSB_SROM8_5GL_PA_2 0x16 ++#define SSB_SROM8_5GH_PA_0 0x18 /* 5.8GHz power amp settings */ ++#define SSB_SROM8_5GH_PA_1 0x1A ++#define SSB_SROM8_5GH_PA_2 0x1C ++ ++/* TODO: Make it deprecated */ #define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */ #define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */ #define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ -@@ -462,6 +479,46 @@ +@@ -456,12 +506,53 @@ + #define SSB_SPROM8_PA1HIB0 0x00D8 /* 5.8GHz power amp settings */ + #define SSB_SPROM8_PA1HIB1 0x00DA + #define SSB_SPROM8_PA1HIB2 0x00DC ++ + #define SSB_SPROM8_CCK2GPO 0x0140 /* CCK power offset */ + #define SSB_SPROM8_OFDM2GPO 0x0142 /* 2.4GHz OFDM power offset */ + #define SSB_SPROM8_OFDM5GPO 0x0146 /* 5.3GHz OFDM power offset */ #define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */ #define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */ -- cgit v1.2.3