From 6c312d9717e1fd37552a6e840967cb0061f7bc8f Mon Sep 17 00:00:00 2001 From: Daniel Golle Date: Tue, 4 Jan 2022 23:01:53 +0000 Subject: kernel: improve driver support for gen-3 Aquantia Ethernet PHYs * correctly set system side interface, the original patch was errornous and there is a follow-up fix for it * enable phy statistics for AQR112(+R/C) and ARQ412 (ethtool --phy-statistics ethX) Tested, including phy-statistics, on - IEI Puzzle M901 (AQR112, AQR112C, AQR112R) - IEI Puzzle M902 (AQR113, AQR112R) - Ubiquiti UniFi 6 LR (AQR112C) Signed-off-by: Daniel Golle --- ...-phy-aquantia-fix-system-side-protocol-mi.patch | 34 ++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100644 target/linux/generic/hack-5.10/723-net-phy-aquantia-fix-system-side-protocol-mi.patch (limited to 'target/linux/generic/hack-5.10/723-net-phy-aquantia-fix-system-side-protocol-mi.patch') diff --git a/target/linux/generic/hack-5.10/723-net-phy-aquantia-fix-system-side-protocol-mi.patch b/target/linux/generic/hack-5.10/723-net-phy-aquantia-fix-system-side-protocol-mi.patch new file mode 100644 index 0000000000..9c5df905bb --- /dev/null +++ b/target/linux/generic/hack-5.10/723-net-phy-aquantia-fix-system-side-protocol-mi.patch @@ -0,0 +1,34 @@ +From 5f008cb22f60da4e10375f22266c1a4e20b1252e Mon Sep 17 00:00:00 2001 +From: Alex Marginean +Date: Fri, 20 Sep 2019 18:22:52 +0300 +Subject: [PATCH] drivers: net: phy: aquantia: fix system side protocol + misconfiguration + +Do not set up protocols for speeds that are not supported by FW. Enabling +these protocols leads to link issues on system side. + +Signed-off-by: Alex Marginean +--- + drivers/net/phy/aquantia_main.c | 8 +++++++- + 1 file changed, 7 insertions(+), 1 deletion(-) + +--- a/drivers/net/phy/aquantia_main.c ++++ b/drivers/net/phy/aquantia_main.c +@@ -301,10 +301,16 @@ static int aqr_config_aneg_set_prot(stru + phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GSTART_RATE, + aquantia_syscfg[if_type].start_rate); + +- for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++) ++ for (i = 0; i <= aquantia_syscfg[if_type].cnt; i++) { ++ u16 reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ++ AQUANTIA_VND1_GSYSCFG_BASE + i); ++ if (!reg) ++ continue; ++ + phy_write_mmd(phydev, MDIO_MMD_VEND1, + AQUANTIA_VND1_GSYSCFG_BASE + i, + aquantia_syscfg[if_type].syscfg); ++ } + + /* wake PHY back up */ + phy_write_mmd(phydev, MDIO_MMD_VEND1, AQUANTIA_VND1_GLOBAL_SC, 0); -- cgit v1.2.3