From b50fd8c2b3abdd557bd7d2bb5628f03b20801350 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Tue, 7 Feb 2017 12:31:02 +0100 Subject: brcm63xx: register SPI controllers through DT Register SPI controllers through device tree. We will wire up the clocks at a later stage. Signed-off-by: Jonas Gorski --- target/linux/brcm63xx/dts/bcm6362.dtsi | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) (limited to 'target/linux/brcm63xx/dts/bcm6362.dtsi') diff --git a/target/linux/brcm63xx/dts/bcm6362.dtsi b/target/linux/brcm63xx/dts/bcm6362.dtsi index a6a5c1f1d0..2085fd53bf 100644 --- a/target/linux/brcm63xx/dts/bcm6362.dtsi +++ b/target/linux/brcm63xx/dts/bcm6362.dtsi @@ -6,6 +6,8 @@ aliases { gpio0 = &gpio0; gpio1 = &gpio1; + spi0 = &lsspi; + spi1 = &hsspi; }; cpus { @@ -40,6 +42,7 @@ #size-cells = <1>; ranges; compatible = "simple-bus"; + interrupt-parent = <&periph_intc>; ext_intc: interrupt-controller@10000018 { compatible = "brcm,bcm6345-ext-intc"; @@ -48,7 +51,6 @@ interrupt-controller; #interrupt-cells = <2>; - interrupt-parent = <&periph_intc>; interrupts = <40>, <41>, <42>, <43>; }; @@ -86,5 +88,23 @@ interrupt-names = "gpio24", "gpio25", "gpio26", "gpio27"; }; + + lsspi: spi@10000800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6358-spi"; + reg = <0x10000800 0x70c>; + interrupts = <2>; + /* clocks = <&clkctl 15>; */ + }; + + hsspi: spi@10001000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6328-hsspi"; + reg = <0x10001000 0x600>; + interrupts = <5>; + /* clocks = <&clkctl 16>; */ + }; }; }; -- cgit v1.2.3