From b50fd8c2b3abdd557bd7d2bb5628f03b20801350 Mon Sep 17 00:00:00 2001 From: Jonas Gorski Date: Tue, 7 Feb 2017 12:31:02 +0100 Subject: brcm63xx: register SPI controllers through DT Register SPI controllers through device tree. We will wire up the clocks at a later stage. Signed-off-by: Jonas Gorski --- target/linux/brcm63xx/dts/bcm6358.dtsi | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) (limited to 'target/linux/brcm63xx/dts/bcm6358.dtsi') diff --git a/target/linux/brcm63xx/dts/bcm6358.dtsi b/target/linux/brcm63xx/dts/bcm6358.dtsi index 9d95849b3a..e4aecf7970 100644 --- a/target/linux/brcm63xx/dts/bcm6358.dtsi +++ b/target/linux/brcm63xx/dts/bcm6358.dtsi @@ -7,6 +7,7 @@ pflash = &pflash; gpio0 = &gpio0; gpio1 = &gpio1; + spi0 = &lsspi; }; cpus { @@ -51,6 +52,7 @@ #size-cells = <1>; ranges; compatible = "simple-bus"; + interrupt-parent = <&periph_intc>; periph_intc: interrupt-controller@fffe000c { compatible = "brcm,bcm6345-l1-intc"; @@ -71,7 +73,6 @@ interrupt-controller; #interrupt-cells = <2>; - interrupt-parent = <&periph_intc>; interrupts = <25>, <26>, <27>, <28>; }; @@ -82,7 +83,6 @@ interrupt-controller; #interrupt-cells = <2>; - interrupt-parent = <&periph_intc>; interrupts = <20>, <21>; }; @@ -112,5 +112,14 @@ gpio-controller; #gpio-cells = <2>; }; + + lsspi: spi@fffe0800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "brcm,bcm6358-spi"; + reg = <0xfffe0800 0x70c>; + interrupts = <1>; + /* clocks = <&clkctl 9>; */ + }; }; }; -- cgit v1.2.3