From 079871983c90eee18f6926d10c8d2fdc16b1cafd Mon Sep 17 00:00:00 2001 From: Koen Vandeputte Date: Thu, 6 Sep 2018 14:25:15 +0200 Subject: kernel: bump 4.14 to 4.14.68 Refreshed all patches. Remove upstream accepted: - 330-Revert-MIPS-BCM47XX-Enable-74K-Core-ExternalSync-for.patch Altered: - 303-v4.16-netfilter-nf_tables-remove-multihook-chains-and-fami.patch - 308-mips32r2_tune.patch Compile-tested on: cns3xxx, imx6 Runtime-tested on: cns3xxx, imx6 Signed-off-by: Koen Vandeputte --- ...-BCM47XX-Enable-74K-Core-ExternalSync-for.patch | 76 ---------------------- 1 file changed, 76 deletions(-) delete mode 100644 target/linux/brcm47xx/patches-4.14/330-Revert-MIPS-BCM47XX-Enable-74K-Core-ExternalSync-for.patch (limited to 'target/linux/brcm47xx/patches-4.14') diff --git a/target/linux/brcm47xx/patches-4.14/330-Revert-MIPS-BCM47XX-Enable-74K-Core-ExternalSync-for.patch b/target/linux/brcm47xx/patches-4.14/330-Revert-MIPS-BCM47XX-Enable-74K-Core-ExternalSync-for.patch deleted file mode 100644 index ad306210b9..0000000000 --- a/target/linux/brcm47xx/patches-4.14/330-Revert-MIPS-BCM47XX-Enable-74K-Core-ExternalSync-for.patch +++ /dev/null @@ -1,76 +0,0 @@ -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Fri, 27 Jul 2018 12:39:01 +0200 -Subject: [PATCH] Revert "MIPS: BCM47XX: Enable 74K Core ExternalSync for PCIe - erratum" -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This reverts commit 2a027b47dba6b77ab8c8e47b589ae9bbc5ac6175. - -Enabling ExternalSync caused a regression for BCM4718A1 (used e.g. in -Netgear E3000 and ASUS RT-N16): it simply hangs during PCIe -initialization. It's likely that BCM4717A1 is also affected. - -I didn't notice that earlier as the only BCM47XX devices with PCIe I -own are: -1) BCM4706 with 2 x 14e4:4331 -2) BCM4706 with 14e4:4360 and 14e4:4331 -it appears that BCM4706 is unaffected. - -While BCM5300X-ES300-RDS.pdf seems to document that erratum and its -workarounds (according to quotes provided by Tokunori) it seems not even -Broadcom follows them. - -According to the provided info Broadcom should define CONF7_ES in their -SDK's mipsinc.h and implement workaround in the si_mips_init(). Checking -both didn't reveal such code. It *could* mean Broadcom also had some -problems with the given workaround. - -Reported-by: Michael Marley -Cc: Tokunori Ikegami -Cc: Paul Burton -Cc: Hauke Mehrtens -Cc: Chris Packham -Cc: stable@vger.kernel.org -Cc: James Hogan -Signed-off-by: Rafał Miłecki ---- - arch/mips/bcm47xx/setup.c | 6 ------ - arch/mips/include/asm/mipsregs.h | 3 --- - 2 files changed, 9 deletions(-) - ---- a/arch/mips/bcm47xx/setup.c -+++ b/arch/mips/bcm47xx/setup.c -@@ -212,12 +212,6 @@ static int __init bcm47xx_cpu_fixes(void - */ - if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706) - cpu_wait = NULL; -- -- /* -- * BCM47XX Erratum "R10: PCIe Transactions Periodically Fail" -- * Enable ExternalSync for sync instruction to take effect -- */ -- set_c0_config7(MIPS_CONF7_ES); - break; - #endif - } ---- a/arch/mips/include/asm/mipsregs.h -+++ b/arch/mips/include/asm/mipsregs.h -@@ -680,8 +680,6 @@ - #define MIPS_CONF7_WII (_ULCAST_(1) << 31) - - #define MIPS_CONF7_RPS (_ULCAST_(1) << 2) --/* ExternalSync */ --#define MIPS_CONF7_ES (_ULCAST_(1) << 8) - - #define MIPS_CONF7_IAR (_ULCAST_(1) << 10) - #define MIPS_CONF7_AR (_ULCAST_(1) << 16) -@@ -2747,7 +2745,6 @@ __BUILD_SET_C0(status) - __BUILD_SET_C0(cause) - __BUILD_SET_C0(config) - __BUILD_SET_C0(config5) --__BUILD_SET_C0(config7) - __BUILD_SET_C0(intcontrol) - __BUILD_SET_C0(intctl) - __BUILD_SET_C0(srsmap) -- cgit v1.2.3