From 885eea184225e2d190f7aa8742ac806034caa9fc Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Thu, 10 Jan 2013 14:05:18 +0000 Subject: kernel: update bcma and ssb to master-2013-01-09 from wireless-testing SVN-Revision: 35080 --- .../015-MIPS-BCM47XX-remove-GPIO-driver.patch | 360 +++++++++++++++++++++ 1 file changed, 360 insertions(+) create mode 100644 target/linux/brcm47xx/patches-3.6/015-MIPS-BCM47XX-remove-GPIO-driver.patch (limited to 'target/linux/brcm47xx/patches-3.6/015-MIPS-BCM47XX-remove-GPIO-driver.patch') diff --git a/target/linux/brcm47xx/patches-3.6/015-MIPS-BCM47XX-remove-GPIO-driver.patch b/target/linux/brcm47xx/patches-3.6/015-MIPS-BCM47XX-remove-GPIO-driver.patch new file mode 100644 index 0000000000..b39bdc4412 --- /dev/null +++ b/target/linux/brcm47xx/patches-3.6/015-MIPS-BCM47XX-remove-GPIO-driver.patch @@ -0,0 +1,360 @@ +commit 2da4c74dc3711275e82856e62884c99f7a45f541 +Author: Hauke Mehrtens +Date: Tue Nov 20 22:24:34 2012 +0000 + + MIPS: BCM47XX: remove GPIO driver + + Instated of providing an own GPIO driver use the one provided by ssb and + bcma. + + Signed-off-by: Hauke Mehrtens + Patchwork: http://patchwork.linux-mips.org/patch/4592 + Acked-by: Florian Fainelli + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -101,6 +101,7 @@ config ATH79 + + config BCM47XX + bool "Broadcom BCM47XX based boards" ++ select ARCH_WANT_OPTIONAL_GPIOLIB + select CEVT_R4K + select CSRC_R4K + select DMA_NONCOHERENT +@@ -108,7 +109,6 @@ config BCM47XX + select IRQ_CPU + select SYS_SUPPORTS_32BIT_KERNEL + select SYS_SUPPORTS_LITTLE_ENDIAN +- select GENERIC_GPIO + select SYS_HAS_EARLY_PRINTK + select CFE + help +--- a/arch/mips/bcm47xx/Kconfig ++++ b/arch/mips/bcm47xx/Kconfig +@@ -9,6 +9,7 @@ config BCM47XX_SSB + select SSB_EMBEDDED + select SSB_B43_PCI_BRIDGE if PCI + select SSB_PCICORE_HOSTMODE if PCI ++ select SSB_DRIVER_GPIO + default y + help + Add support for old Broadcom BCM47xx boards with Sonics Silicon Backplane support. +@@ -23,6 +24,7 @@ config BCM47XX_BCMA + select BCMA_DRIVER_MIPS + select BCMA_HOST_PCI if PCI + select BCMA_DRIVER_PCI_HOSTMODE if PCI ++ select BCMA_DRIVER_GPIO + default y + help + Add support for new Broadcom BCM47xx boards with Broadcom specific Advanced Microcontroller Bus. +--- a/arch/mips/bcm47xx/Makefile ++++ b/arch/mips/bcm47xx/Makefile +@@ -3,5 +3,5 @@ + # under Linux. + # + +-obj-y += gpio.o irq.o nvram.o prom.o serial.o setup.o time.o sprom.o ++obj-y += irq.o nvram.o prom.o serial.o setup.o time.o sprom.o + obj-$(CONFIG_BCM47XX_SSB) += wgt634u.o +--- a/arch/mips/bcm47xx/gpio.c ++++ /dev/null +@@ -1,102 +0,0 @@ +-/* +- * This file is subject to the terms and conditions of the GNU General Public +- * License. See the file "COPYING" in the main directory of this archive +- * for more details. +- * +- * Copyright (C) 2007 Aurelien Jarno +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +- +-#if (BCM47XX_CHIPCO_GPIO_LINES > BCM47XX_EXTIF_GPIO_LINES) +-static DECLARE_BITMAP(gpio_in_use, BCM47XX_CHIPCO_GPIO_LINES); +-#else +-static DECLARE_BITMAP(gpio_in_use, BCM47XX_EXTIF_GPIO_LINES); +-#endif +- +-int gpio_request(unsigned gpio, const char *tag) +-{ +- switch (bcm47xx_bus_type) { +-#ifdef CONFIG_BCM47XX_SSB +- case BCM47XX_BUS_TYPE_SSB: +- if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && +- ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) +- return -EINVAL; +- +- if (ssb_extif_available(&bcm47xx_bus.ssb.extif) && +- ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) +- return -EINVAL; +- +- if (test_and_set_bit(gpio, gpio_in_use)) +- return -EBUSY; +- +- return 0; +-#endif +-#ifdef CONFIG_BCM47XX_BCMA +- case BCM47XX_BUS_TYPE_BCMA: +- if (gpio >= BCM47XX_CHIPCO_GPIO_LINES) +- return -EINVAL; +- +- if (test_and_set_bit(gpio, gpio_in_use)) +- return -EBUSY; +- +- return 0; +-#endif +- } +- return -EINVAL; +-} +-EXPORT_SYMBOL(gpio_request); +- +-void gpio_free(unsigned gpio) +-{ +- switch (bcm47xx_bus_type) { +-#ifdef CONFIG_BCM47XX_SSB +- case BCM47XX_BUS_TYPE_SSB: +- if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco) && +- ((unsigned)gpio >= BCM47XX_CHIPCO_GPIO_LINES)) +- return; +- +- if (ssb_extif_available(&bcm47xx_bus.ssb.extif) && +- ((unsigned)gpio >= BCM47XX_EXTIF_GPIO_LINES)) +- return; +- +- clear_bit(gpio, gpio_in_use); +- return; +-#endif +-#ifdef CONFIG_BCM47XX_BCMA +- case BCM47XX_BUS_TYPE_BCMA: +- if (gpio >= BCM47XX_CHIPCO_GPIO_LINES) +- return; +- +- clear_bit(gpio, gpio_in_use); +- return; +-#endif +- } +-} +-EXPORT_SYMBOL(gpio_free); +- +-int gpio_to_irq(unsigned gpio) +-{ +- switch (bcm47xx_bus_type) { +-#ifdef CONFIG_BCM47XX_SSB +- case BCM47XX_BUS_TYPE_SSB: +- if (ssb_chipco_available(&bcm47xx_bus.ssb.chipco)) +- return ssb_mips_irq(bcm47xx_bus.ssb.chipco.dev) + 2; +- else if (ssb_extif_available(&bcm47xx_bus.ssb.extif)) +- return ssb_mips_irq(bcm47xx_bus.ssb.extif.dev) + 2; +- else +- return -EINVAL; +-#endif +-#ifdef CONFIG_BCM47XX_BCMA +- case BCM47XX_BUS_TYPE_BCMA: +- return bcma_core_mips_irq(bcm47xx_bus.bcma.bus.drv_cc.core) + 2; +-#endif +- } +- return -EINVAL; +-} +-EXPORT_SYMBOL_GPL(gpio_to_irq); +--- a/arch/mips/bcm47xx/wgt634u.c ++++ b/arch/mips/bcm47xx/wgt634u.c +@@ -11,6 +11,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -116,7 +117,8 @@ static irqreturn_t gpio_interrupt(int ir + + /* Interrupt are level triggered, revert the interrupt polarity + to clear the interrupt. */ +- gpio_polarity(WGT634U_GPIO_RESET, state); ++ ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << WGT634U_GPIO_RESET, ++ state ? 1 << WGT634U_GPIO_RESET : 0); + + if (!state) { + printk(KERN_INFO "Reset button pressed"); +@@ -150,7 +152,9 @@ static int __init wgt634u_init(void) + gpio_interrupt, IRQF_SHARED, + "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) { + gpio_direction_input(WGT634U_GPIO_RESET); +- gpio_intmask(WGT634U_GPIO_RESET, 1); ++ ssb_gpio_intmask(&bcm47xx_bus.ssb, ++ 1 << WGT634U_GPIO_RESET, ++ 1 << WGT634U_GPIO_RESET); + ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco, + SSB_CHIPCO_IRQ_GPIO, + SSB_CHIPCO_IRQ_GPIO); +--- a/arch/mips/include/asm/mach-bcm47xx/gpio.h ++++ b/arch/mips/include/asm/mach-bcm47xx/gpio.h +@@ -1,155 +1,17 @@ +-/* +- * This file is subject to the terms and conditions of the GNU General Public +- * License. See the file "COPYING" in the main directory of this archive +- * for more details. +- * +- * Copyright (C) 2007 Aurelien Jarno +- */ ++#ifndef __ASM_MIPS_MACH_BCM47XX_GPIO_H ++#define __ASM_MIPS_MACH_BCM47XX_GPIO_H + +-#ifndef __BCM47XX_GPIO_H +-#define __BCM47XX_GPIO_H ++#include + +-#include +-#include +-#include ++#define gpio_get_value __gpio_get_value ++#define gpio_set_value __gpio_set_value + +-#define BCM47XX_EXTIF_GPIO_LINES 5 +-#define BCM47XX_CHIPCO_GPIO_LINES 16 ++#define gpio_cansleep __gpio_cansleep ++#define gpio_to_irq __gpio_to_irq + +-extern int gpio_request(unsigned gpio, const char *label); +-extern void gpio_free(unsigned gpio); +-extern int gpio_to_irq(unsigned gpio); +- +-static inline int gpio_get_value(unsigned gpio) ++static inline int irq_to_gpio(unsigned int irq) + { +- switch (bcm47xx_bus_type) { +-#ifdef CONFIG_BCM47XX_SSB +- case BCM47XX_BUS_TYPE_SSB: +- return ssb_gpio_in(&bcm47xx_bus.ssb, 1 << gpio); +-#endif +-#ifdef CONFIG_BCM47XX_BCMA +- case BCM47XX_BUS_TYPE_BCMA: +- return bcma_chipco_gpio_in(&bcm47xx_bus.bcma.bus.drv_cc, +- 1 << gpio); +-#endif +- } + return -EINVAL; + } + +-#define gpio_get_value_cansleep gpio_get_value +- +-static inline void gpio_set_value(unsigned gpio, int value) +-{ +- switch (bcm47xx_bus_type) { +-#ifdef CONFIG_BCM47XX_SSB +- case BCM47XX_BUS_TYPE_SSB: +- ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio, +- value ? 1 << gpio : 0); +- return; +-#endif +-#ifdef CONFIG_BCM47XX_BCMA +- case BCM47XX_BUS_TYPE_BCMA: +- bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio, +- value ? 1 << gpio : 0); +- return; + #endif +- } +-} +- +-#define gpio_set_value_cansleep gpio_set_value +- +-static inline int gpio_cansleep(unsigned gpio) +-{ +- return 0; +-} +- +-static inline int gpio_is_valid(unsigned gpio) +-{ +- return gpio < (BCM47XX_EXTIF_GPIO_LINES + BCM47XX_CHIPCO_GPIO_LINES); +-} +- +- +-static inline int gpio_direction_input(unsigned gpio) +-{ +- switch (bcm47xx_bus_type) { +-#ifdef CONFIG_BCM47XX_SSB +- case BCM47XX_BUS_TYPE_SSB: +- ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 0); +- return 0; +-#endif +-#ifdef CONFIG_BCM47XX_BCMA +- case BCM47XX_BUS_TYPE_BCMA: +- bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio, +- 0); +- return 0; +-#endif +- } +- return -EINVAL; +-} +- +-static inline int gpio_direction_output(unsigned gpio, int value) +-{ +- switch (bcm47xx_bus_type) { +-#ifdef CONFIG_BCM47XX_SSB +- case BCM47XX_BUS_TYPE_SSB: +- /* first set the gpio out value */ +- ssb_gpio_out(&bcm47xx_bus.ssb, 1 << gpio, +- value ? 1 << gpio : 0); +- /* then set the gpio mode */ +- ssb_gpio_outen(&bcm47xx_bus.ssb, 1 << gpio, 1 << gpio); +- return 0; +-#endif +-#ifdef CONFIG_BCM47XX_BCMA +- case BCM47XX_BUS_TYPE_BCMA: +- /* first set the gpio out value */ +- bcma_chipco_gpio_out(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio, +- value ? 1 << gpio : 0); +- /* then set the gpio mode */ +- bcma_chipco_gpio_outen(&bcm47xx_bus.bcma.bus.drv_cc, 1 << gpio, +- 1 << gpio); +- return 0; +-#endif +- } +- return -EINVAL; +-} +- +-static inline int gpio_intmask(unsigned gpio, int value) +-{ +- switch (bcm47xx_bus_type) { +-#ifdef CONFIG_BCM47XX_SSB +- case BCM47XX_BUS_TYPE_SSB: +- ssb_gpio_intmask(&bcm47xx_bus.ssb, 1 << gpio, +- value ? 1 << gpio : 0); +- return 0; +-#endif +-#ifdef CONFIG_BCM47XX_BCMA +- case BCM47XX_BUS_TYPE_BCMA: +- bcma_chipco_gpio_intmask(&bcm47xx_bus.bcma.bus.drv_cc, +- 1 << gpio, value ? 1 << gpio : 0); +- return 0; +-#endif +- } +- return -EINVAL; +-} +- +-static inline int gpio_polarity(unsigned gpio, int value) +-{ +- switch (bcm47xx_bus_type) { +-#ifdef CONFIG_BCM47XX_SSB +- case BCM47XX_BUS_TYPE_SSB: +- ssb_gpio_polarity(&bcm47xx_bus.ssb, 1 << gpio, +- value ? 1 << gpio : 0); +- return 0; +-#endif +-#ifdef CONFIG_BCM47XX_BCMA +- case BCM47XX_BUS_TYPE_BCMA: +- bcma_chipco_gpio_polarity(&bcm47xx_bus.bcma.bus.drv_cc, +- 1 << gpio, value ? 1 << gpio : 0); +- return 0; +-#endif +- } +- return -EINVAL; +-} +- +- +-#endif /* __BCM47XX_GPIO_H */ -- cgit v1.2.3