From 525b311bf869d7e252d744e501e227263a955c8e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Sun, 24 Apr 2016 13:03:39 +0200 Subject: brcm2708: update linux 4.4 patches to latest version MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit As usual these patches were extracted from the raspberry pi repo: https://github.com/raspberrypi/linux/tree/rpi-4.4.y Signed-off-by: Álvaro Fernández Rojas --- .../0267-clk-bcm2835-Fix-PLL-poweron.patch | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 target/linux/brcm2708/patches-4.4/0267-clk-bcm2835-Fix-PLL-poweron.patch (limited to 'target/linux/brcm2708/patches-4.4/0267-clk-bcm2835-Fix-PLL-poweron.patch') diff --git a/target/linux/brcm2708/patches-4.4/0267-clk-bcm2835-Fix-PLL-poweron.patch b/target/linux/brcm2708/patches-4.4/0267-clk-bcm2835-Fix-PLL-poweron.patch new file mode 100644 index 0000000000..1940b937af --- /dev/null +++ b/target/linux/brcm2708/patches-4.4/0267-clk-bcm2835-Fix-PLL-poweron.patch @@ -0,0 +1,32 @@ +From 66350cdbb13029d143f99c97b0953805afe2f175 Mon Sep 17 00:00:00 2001 +From: Eric Anholt +Date: Wed, 13 Apr 2016 13:05:03 -0700 +Subject: [PATCH 267/304] clk: bcm2835: Fix PLL poweron + +In poweroff, we set the reset bit and the power down bit, but only +managed to unset the reset bit for poweron. This meant that if HDMI +did -EPROBE_DEFER after it had grabbed its clocks, we'd power down the +PLLH (that had been on at boot time) and never recover. + +Signed-off-by: Eric Anholt +Fixes: 41691b8862e2 ("clk: bcm2835: Add support for programming the audio domain clocks") +Cc: stable@vger.kernel.org +Signed-off-by: Stephen Boyd +(cherry picked from commit d794a7b18350b7538e64248adf639f2cb8da5fb7) +--- + drivers/clk/bcm/clk-bcm2835.c | 4 ++++ + 1 file changed, 4 insertions(+) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -557,6 +557,10 @@ static int bcm2835_pll_on(struct clk_hw + const struct bcm2835_pll_data *data = pll->data; + ktime_t timeout; + ++ cprman_write(cprman, data->a2w_ctrl_reg, ++ cprman_read(cprman, data->a2w_ctrl_reg) & ++ ~A2W_PLL_CTRL_PWRDN); ++ + /* Take the PLL out of reset. */ + cprman_write(cprman, data->cm_ctrl_reg, + cprman_read(cprman, data->cm_ctrl_reg) & ~CM_PLL_ANARST); -- cgit v1.2.3