From 662394fb30fdbcc89ec387918714aebee6868a9f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Wed, 4 Sep 2019 19:01:23 +0200 Subject: brcm2708: update to latest patches from RPi foundation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas --- .../950-0137-staging-vc04_services-Derive-g_cache_line_size.patch | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch') diff --git a/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch b/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch index c1d07684be..bdc87f4a3f 100644 --- a/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch +++ b/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch @@ -1,7 +1,7 @@ -From 4be8b9877d1174efea1ece7b776940795e23bd61 Mon Sep 17 00:00:00 2001 +From 32c4aeec41ce54e0065e975050152a3f10a6ae6d Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 28 Aug 2018 10:40:40 +0100 -Subject: [PATCH 137/773] staging/vc04_services: Derive g_cache_line_size +Subject: [PATCH 137/782] staging/vc04_services: Derive g_cache_line_size The ARM coprocessor registers include dcache line size, but there is no function to expose this value. Rather than create a new one, use the -- cgit v1.2.3