From 19226502bf6393706defe7f049c587b32c9b4f33 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Wed, 31 Jul 2019 18:23:26 +0200 Subject: brcm2708: update to latest patches from the RPi foundation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas --- .../950-0137-staging-vc04_services-Derive-g_cache_line_size.patch | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch') diff --git a/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch b/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch index 5894aca1cd..1d94c2ac1d 100644 --- a/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch +++ b/target/linux/brcm2708/patches-4.19/950-0137-staging-vc04_services-Derive-g_cache_line_size.patch @@ -1,7 +1,7 @@ -From 3e89900d7dd7c851400e0afeea326f94bba1cd84 Mon Sep 17 00:00:00 2001 +From 3e9ee1b0f8b5b8ad3fc688e785de479cbde00b5c Mon Sep 17 00:00:00 2001 From: Phil Elwell Date: Tue, 28 Aug 2018 10:40:40 +0100 -Subject: [PATCH 137/703] staging/vc04_services: Derive g_cache_line_size +Subject: [PATCH 137/725] staging/vc04_services: Derive g_cache_line_size The ARM coprocessor registers include dcache line size, but there is no function to expose this value. Rather than create a new one, use the -- cgit v1.2.3