From eea23c200445648caef53cfbbefe84c4481fe600 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Thu, 14 May 2020 14:51:58 +0200 Subject: bcm63xx: remove linux 4.14 support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Álvaro Fernández Rojas --- ...X-wire-up-BCM6358-s-external-interrupts-4.patch | 57 ---------------------- 1 file changed, 57 deletions(-) delete mode 100644 target/linux/bcm63xx/patches-4.14/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch (limited to 'target/linux/bcm63xx/patches-4.14/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch') diff --git a/target/linux/bcm63xx/patches-4.14/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch b/target/linux/bcm63xx/patches-4.14/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch deleted file mode 100644 index e911f0ead5..0000000000 --- a/target/linux/bcm63xx/patches-4.14/323-MIPS-BCM63XX-wire-up-BCM6358-s-external-interrupts-4.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Sun, 30 Nov 2014 20:20:30 +0100 -Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4 - and 5 - -Due to the external interrupts being non consecutive, the previous -implementation did not support them. Now that we treat both registers -as separate irq controllers, there is no such limitation anymore and -we can expose them for drivers to use. - -Signed-off-by: Jonas Gorski ---- - arch/mips/bcm63xx/irq.c | 5 ++++- - arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++ - arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 + - 3 files changed, 7 insertions(+), 1 deletion(-) - ---- a/arch/mips/bcm63xx/irq.c -+++ b/arch/mips/bcm63xx/irq.c -@@ -108,11 +108,14 @@ void __init arch_init_irq(void) - periph_width = 1; - - ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358; -- ext_irq_count = 4; -+ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358; -+ ext_irq_count = 6; - ext_irqs[0] = BCM_6358_EXT_IRQ0; - ext_irqs[1] = BCM_6358_EXT_IRQ1; - ext_irqs[2] = BCM_6358_EXT_IRQ2; - ext_irqs[3] = BCM_6358_EXT_IRQ3; -+ ext_irqs[4] = BCM_6358_EXT_IRQ4; -+ ext_irqs[5] = BCM_6358_EXT_IRQ5; - ext_shift = 4; - break; - case BCM6362_CPU_ID: ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -@@ -896,6 +896,8 @@ enum bcm63xx_irq { - #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26) - #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27) - #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28) -+#define BCM_6358_EXT_IRQ4 (IRQ_INTERNAL_BASE + 20) -+#define BCM_6358_EXT_IRQ5 (IRQ_INTERNAL_BASE + 21) - - /* - * 6362 irqs ---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -244,6 +244,7 @@ - #define PERF_EXTIRQ_CFG_REG_6362 0x18 - #define PERF_EXTIRQ_CFG_REG_6368 0x18 - -+#define PERF_EXTIRQ_CFG_REG2_6358 0x1c - #define PERF_EXTIRQ_CFG_REG2_6368 0x1c - - /* for 6348 only */ -- cgit v1.2.3