From 41a582a986595ed4e20c3e2969f31a041390e4f6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= Date: Sat, 17 Sep 2016 21:42:57 +0200 Subject: bcm53xx: use upstream accepted ILP clk driver for BCM53573 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Rafał Miłecki --- ...clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch | 224 +++++++++++++++++++ ...clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch | 241 --------------------- 2 files changed, 224 insertions(+), 241 deletions(-) create mode 100644 target/linux/bcm53xx/patches-4.4/089-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch delete mode 100644 target/linux/bcm53xx/patches-4.4/830-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch (limited to 'target/linux/bcm53xx') diff --git a/target/linux/bcm53xx/patches-4.4/089-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch b/target/linux/bcm53xx/patches-4.4/089-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch new file mode 100644 index 0000000000..b3f8b9107b --- /dev/null +++ b/target/linux/bcm53xx/patches-4.4/089-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch @@ -0,0 +1,224 @@ +From bd8dd593f7d2211f2273e05741d157b0c8d020ae Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Tue, 13 Sep 2016 09:06:04 +0200 +Subject: [PATCH] clk: bcm: Add driver for BCM53573 ILP clock +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +This clock is present on BCM53573 devices (including BCM47189) that use +Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function +device so we use syscon (and regmap) for it. + +Signed-off-by: Rafał Miłecki +Acked-by: Rob Herring +[sboyd@codeaurora.org: Remove 0 from clk_init_data to silence sparse] +Signed-off-by: Stephen Boyd +--- + .../bindings/clock/brcm,bcm53573-ilp.txt | 36 +++++ + drivers/clk/bcm/Makefile | 1 + + drivers/clk/bcm/clk-bcm53573-ilp.c | 148 +++++++++++++++++++++ + 3 files changed, 185 insertions(+) + create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt + create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c + +--- /dev/null ++++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt +@@ -0,0 +1,36 @@ ++Broadcom BCM53573 ILP clock ++=========================== ++ ++This binding uses the common clock binding: ++ Documentation/devicetree/bindings/clock/clock-bindings.txt ++ ++This binding is used for ILP clock (sometimes referred as "slow clock") ++on Broadcom BCM53573 devices using Cortex-A7 CPU. ++ ++ILP's rate has to be calculated on runtime and it depends on ALP clock ++which has to be referenced. ++ ++This clock is part of PMU (Power Management Unit), a Broadcom's device ++handing power-related aspects. Its node must be sub-node of the PMU ++device. ++ ++Required properties: ++- compatible: "brcm,bcm53573-ilp" ++- clocks: has to reference an ALP clock ++- #clock-cells: should be <0> ++- clock-output-names: from common clock bindings, should contain clock ++ name ++ ++Example: ++ ++pmu@18012000 { ++ compatible = "simple-mfd", "syscon"; ++ reg = <0x18012000 0x00001000>; ++ ++ ilp { ++ compatible = "brcm,bcm53573-ilp"; ++ clocks = <&alp>; ++ #clock-cells = <0>; ++ clock-output-names = "ilp"; ++ }; ++}; +--- a/drivers/clk/bcm/Makefile ++++ b/drivers/clk/bcm/Makefile +@@ -4,6 +4,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281 + obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o + obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o + obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o ++obj-$(CONFIG_ARCH_BCM_53573) += clk-bcm53573-ilp.o + obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o + obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o + obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o +--- /dev/null ++++ b/drivers/clk/bcm/clk-bcm53573-ilp.c +@@ -0,0 +1,148 @@ ++/* ++ * Copyright (C) 2016 Rafał Miłecki ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define PMU_XTAL_FREQ_RATIO 0x66c ++#define XTAL_ALP_PER_4ILP 0x00001fff ++#define XTAL_CTL_EN 0x80000000 ++#define PMU_SLOW_CLK_PERIOD 0x6dc ++ ++struct bcm53573_ilp { ++ struct clk_hw hw; ++ struct regmap *regmap; ++}; ++ ++static int bcm53573_ilp_enable(struct clk_hw *hw) ++{ ++ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw); ++ ++ regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0x10199); ++ regmap_write(ilp->regmap, 0x674, 0x10000); ++ ++ return 0; ++} ++ ++static void bcm53573_ilp_disable(struct clk_hw *hw) ++{ ++ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw); ++ ++ regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0); ++ regmap_write(ilp->regmap, 0x674, 0); ++} ++ ++static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw, ++ unsigned long parent_rate) ++{ ++ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw); ++ struct regmap *regmap = ilp->regmap; ++ u32 last_val, cur_val; ++ int sum = 0, num = 0, loop_num = 0; ++ int avg; ++ ++ /* Enable measurement */ ++ regmap_write(regmap, PMU_XTAL_FREQ_RATIO, XTAL_CTL_EN); ++ ++ /* Read initial value */ ++ regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &last_val); ++ last_val &= XTAL_ALP_PER_4ILP; ++ ++ /* ++ * At minimum we should loop for a bit to let hardware do the ++ * measurement. This isn't very accurate however, so for a better ++ * precision lets try getting 20 different values for and use average. ++ */ ++ while (num < 20) { ++ regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &cur_val); ++ cur_val &= XTAL_ALP_PER_4ILP; ++ ++ if (cur_val != last_val) { ++ /* Got different value, use it */ ++ sum += cur_val; ++ num++; ++ loop_num = 0; ++ last_val = cur_val; ++ } else if (++loop_num > 5000) { ++ /* Same value over and over, give up */ ++ sum += cur_val; ++ num++; ++ break; ++ } ++ ++ cpu_relax(); ++ } ++ ++ /* Disable measurement to save power */ ++ regmap_write(regmap, PMU_XTAL_FREQ_RATIO, 0x0); ++ ++ avg = sum / num; ++ ++ return parent_rate * 4 / avg; ++} ++ ++static const struct clk_ops bcm53573_ilp_clk_ops = { ++ .enable = bcm53573_ilp_enable, ++ .disable = bcm53573_ilp_disable, ++ .recalc_rate = bcm53573_ilp_recalc_rate, ++}; ++ ++static void bcm53573_ilp_init(struct device_node *np) ++{ ++ struct bcm53573_ilp *ilp; ++ struct clk_init_data init = { }; ++ const char *parent_name; ++ int err; ++ ++ ilp = kzalloc(sizeof(*ilp), GFP_KERNEL); ++ if (!ilp) ++ return; ++ ++ parent_name = of_clk_get_parent_name(np, 0); ++ if (!parent_name) { ++ err = -ENOENT; ++ goto err_free_ilp; ++ } ++ ++ ilp->regmap = syscon_node_to_regmap(of_get_parent(np)); ++ if (IS_ERR(ilp->regmap)) { ++ err = PTR_ERR(ilp->regmap); ++ goto err_free_ilp; ++ } ++ ++ init.name = np->name; ++ init.ops = &bcm53573_ilp_clk_ops; ++ init.parent_names = &parent_name; ++ init.num_parents = 1; ++ ++ ilp->hw.init = &init; ++ err = clk_hw_register(NULL, &ilp->hw); ++ if (err) ++ goto err_free_ilp; ++ ++ err = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &ilp->hw); ++ if (err) ++ goto err_clk_hw_unregister; ++ ++ return; ++ ++err_clk_hw_unregister: ++ clk_hw_unregister(&ilp->hw); ++err_free_ilp: ++ kfree(ilp); ++ pr_err("Failed to init ILP clock: %d\n", err); ++} ++ ++/* We need it very early for arch code, before device model gets ready */ ++CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init); diff --git a/target/linux/bcm53xx/patches-4.4/830-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch b/target/linux/bcm53xx/patches-4.4/830-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch deleted file mode 100644 index a46c08a086..0000000000 --- a/target/linux/bcm53xx/patches-4.4/830-clk-bcm-Add-driver-for-BCM53573-ILP-clock.patch +++ /dev/null @@ -1,241 +0,0 @@ -From 205fc550ceb74f7e8bfcba5c5c7329aa1b34d4ee Mon Sep 17 00:00:00 2001 -From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= -Date: Fri, 29 Jul 2016 14:48:19 +0200 -Subject: [PATCH V8] clk: bcm: Add driver for BCM53573 ILP clock -MIME-Version: 1.0 -Content-Type: text/plain; charset=UTF-8 -Content-Transfer-Encoding: 8bit - -This clock is present on BCM53573 devices (including BCM47189) that use -Cortex-A7. ILP is a part of PMU (Power Management Unit) multi-function -device so we use syscon (and regmap) for it. - -Signed-off-by: Rafał Miłecki ---- -V2: Rebase on top of clk-next - Use ALP as parent clock - Improve comments - Switch from ioremap_nocache to ioremap - Check of_clk_add_provide result for error -V3: Drop #include - Make ILP DT entry part of PMU - Describe ILP as subdevice of PMU in Documentation -V4: Use BCM53573 name as suggested by Jon and Ray. It seems "Northstar" - (even if used in some resources) should be used in relation to - Cortex-A9 devices only. -V5: Rename remaining "ns" references to "bcm53573", sorry, I sent V4 too - early. -V6: Drop #include - Use "int" as type where it matches usage - Add cpu_relax() in the loop - Add disable callback - Use _hw_ functions for registering struct clk_hw (new API) - - Thanks a lot Stephen! -V7: Use syscon and regmap (thanks Rob!) -V8: Update Documentation (drop unused "reg", unit address) ---- - .../bindings/clock/brcm,bcm53573-ilp.txt | 36 +++++ - drivers/clk/bcm/Makefile | 1 + - drivers/clk/bcm/clk-bcm53573-ilp.c | 148 +++++++++++++++++++++ - 3 files changed, 185 insertions(+) - create mode 100644 Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt - create mode 100644 drivers/clk/bcm/clk-bcm53573-ilp.c - ---- /dev/null -+++ b/Documentation/devicetree/bindings/clock/brcm,bcm53573-ilp.txt -@@ -0,0 +1,36 @@ -+Broadcom BCM53573 ILP clock -+=========================== -+ -+This binding uses the common clock binding: -+ Documentation/devicetree/bindings/clock/clock-bindings.txt -+ -+This binding is used for ILP clock (sometimes referred as "slow clock") -+on Broadcom BCM53573 devices using Cortex-A7 CPU. -+ -+ILP's rate has to be calculated on runtime and it depends on ALP clock -+which has to be referenced. -+ -+This clock is part of PMU (Power Management Unit), a Broadcom's device -+handing power-related aspects. Its node must be sub-node of the PMU -+device. -+ -+Required properties: -+- compatible: "brcm,bcm53573-ilp" -+- clocks: has to reference an ALP clock -+- #clock-cells: should be <0> -+- clock-output-names: from common clock bindings, should contain clock -+ name -+ -+Example: -+ -+pmu@18012000 { -+ compatible = "simple-mfd", "syscon"; -+ reg = <0x18012000 0x00001000>; -+ -+ ilp { -+ compatible = "brcm,bcm53573-ilp"; -+ clocks = <&alp>; -+ #clock-cells = <0>; -+ clock-output-names = "ilp"; -+ }; -+}; ---- a/drivers/clk/bcm/Makefile -+++ b/drivers/clk/bcm/Makefile -@@ -8,3 +8,4 @@ obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns - obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o - obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o - obj-$(CONFIG_ARCH_BCM_5301X) += clk-nsp.o -+obj-$(CONFIG_ARCH_BCM_53573) += clk-bcm53573-ilp.o ---- /dev/null -+++ b/drivers/clk/bcm/clk-bcm53573-ilp.c -@@ -0,0 +1,148 @@ -+/* -+ * Copyright (C) 2016 Rafał Miłecki -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define PMU_XTAL_FREQ_RATIO 0x66c -+#define XTAL_ALP_PER_4ILP 0x00001fff -+#define XTAL_CTL_EN 0x80000000 -+#define PMU_SLOW_CLK_PERIOD 0x6dc -+ -+struct bcm53573_ilp { -+ struct clk_hw hw; -+ struct regmap *regmap; -+}; -+ -+static int bcm53573_ilp_enable(struct clk_hw *hw) -+{ -+ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw); -+ -+ regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0x10199); -+ regmap_write(ilp->regmap, 0x674, 0x10000); -+ -+ return 0; -+} -+ -+static void bcm53573_ilp_disable(struct clk_hw *hw) -+{ -+ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw); -+ -+ regmap_write(ilp->regmap, PMU_SLOW_CLK_PERIOD, 0); -+ regmap_write(ilp->regmap, 0x674, 0); -+} -+ -+static unsigned long bcm53573_ilp_recalc_rate(struct clk_hw *hw, -+ unsigned long parent_rate) -+{ -+ struct bcm53573_ilp *ilp = container_of(hw, struct bcm53573_ilp, hw); -+ struct regmap *regmap = ilp->regmap; -+ u32 last_val, cur_val; -+ int sum = 0, num = 0, loop_num = 0; -+ int avg; -+ -+ /* Enable measurement */ -+ regmap_write(regmap, PMU_XTAL_FREQ_RATIO, XTAL_CTL_EN); -+ -+ /* Read initial value */ -+ regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &last_val); -+ last_val &= XTAL_ALP_PER_4ILP; -+ -+ /* -+ * At minimum we should loop for a bit to let hardware do the -+ * measurement. This isn't very accurate however, so for a better -+ * precision lets try getting 20 different values for and use average. -+ */ -+ while (num < 20) { -+ regmap_read(regmap, PMU_XTAL_FREQ_RATIO, &cur_val); -+ cur_val &= XTAL_ALP_PER_4ILP; -+ -+ if (cur_val != last_val) { -+ /* Got different value, use it */ -+ sum += cur_val; -+ num++; -+ loop_num = 0; -+ last_val = cur_val; -+ } else if (++loop_num > 5000) { -+ /* Same value over and over, give up */ -+ sum += cur_val; -+ num++; -+ break; -+ } -+ -+ cpu_relax(); -+ } -+ -+ /* Disable measurement to save power */ -+ regmap_write(regmap, PMU_XTAL_FREQ_RATIO, 0x0); -+ -+ avg = sum / num; -+ -+ return parent_rate * 4 / avg; -+} -+ -+static const struct clk_ops bcm53573_ilp_clk_ops = { -+ .enable = bcm53573_ilp_enable, -+ .disable = bcm53573_ilp_disable, -+ .recalc_rate = bcm53573_ilp_recalc_rate, -+}; -+ -+static void bcm53573_ilp_init(struct device_node *np) -+{ -+ struct bcm53573_ilp *ilp; -+ struct clk_init_data init = { 0 }; -+ const char *parent_name; -+ int err; -+ -+ ilp = kzalloc(sizeof(*ilp), GFP_KERNEL); -+ if (!ilp) -+ return; -+ -+ parent_name = of_clk_get_parent_name(np, 0); -+ if (!parent_name) { -+ err = -ENOENT; -+ goto err_free_ilp; -+ } -+ -+ ilp->regmap = syscon_node_to_regmap(of_get_parent(np)); -+ if (IS_ERR(ilp->regmap)) { -+ err = PTR_ERR(ilp->regmap); -+ goto err_free_ilp; -+ } -+ -+ init.name = np->name; -+ init.ops = &bcm53573_ilp_clk_ops; -+ init.parent_names = &parent_name; -+ init.num_parents = 1; -+ -+ ilp->hw.init = &init; -+ err = clk_hw_register(NULL, &ilp->hw); -+ if (err) -+ goto err_free_ilp; -+ -+ err = of_clk_add_hw_provider(np, of_clk_hw_simple_get, &ilp->hw); -+ if (err) -+ goto err_clk_hw_unregister; -+ -+ return; -+ -+err_clk_hw_unregister: -+ clk_hw_unregister(&ilp->hw); -+err_free_ilp: -+ kfree(ilp); -+ pr_err("Failed to init ILP clock: %d\n", err); -+} -+ -+/* We need it very early for arch code, before device model gets ready */ -+CLK_OF_DECLARE(bcm53573_ilp_clk, "brcm,bcm53573-ilp", bcm53573_ilp_init); -- cgit v1.2.3