From f07e572f6447465d8938679533d604e402b0f066 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Thu, 18 Feb 2021 18:04:33 +0100 Subject: bcm27xx: import latest patches from the RPi foundation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit bcm2708: boot tested on RPi B+ v1.2 bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G bcm2710: boot tested on RPi 3B v1.2 bcm2711: boot tested on RPi 4B v1.1 4G Signed-off-by: Álvaro Fernández Rojas --- .../950-0347-clk-bcm2835-Disable-v3d-clock.patch | 58 ++++++++++++++++++++++ 1 file changed, 58 insertions(+) create mode 100644 target/linux/bcm27xx/patches-5.4/950-0347-clk-bcm2835-Disable-v3d-clock.patch (limited to 'target/linux/bcm27xx/patches-5.4/950-0347-clk-bcm2835-Disable-v3d-clock.patch') diff --git a/target/linux/bcm27xx/patches-5.4/950-0347-clk-bcm2835-Disable-v3d-clock.patch b/target/linux/bcm27xx/patches-5.4/950-0347-clk-bcm2835-Disable-v3d-clock.patch new file mode 100644 index 0000000000..a7a5221fab --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0347-clk-bcm2835-Disable-v3d-clock.patch @@ -0,0 +1,58 @@ +From 6c37f43308f29a59bc67d4ed010f8fbbf076ec79 Mon Sep 17 00:00:00 2001 +From: popcornmix +Date: Tue, 3 Sep 2019 20:28:00 +0100 +Subject: [PATCH] clk-bcm2835: Disable v3d clock + +This is controlled by firmware, see clk-raspberrypi.c + +Signed-off-by: popcornmix +--- + drivers/clk/bcm/clk-bcm2835.c | 30 ++++++++++++------------------ + 1 file changed, 12 insertions(+), 18 deletions(-) + +--- a/drivers/clk/bcm/clk-bcm2835.c ++++ b/drivers/clk/bcm/clk-bcm2835.c +@@ -1734,16 +1734,12 @@ static const struct bcm2835_clk_desc clk + .hold_mask = CM_PLLA_HOLDCORE, + .fixed_divider = 1, + .flags = CLK_SET_RATE_PARENT), +- [BCM2835_PLLA_PER] = REGISTER_PLL_DIV( +- SOC_ALL, +- .name = "plla_per", +- .source_pll = "plla", +- .cm_reg = CM_PLLA, +- .a2w_reg = A2W_PLLA_PER, +- .load_mask = CM_PLLA_LOADPER, +- .hold_mask = CM_PLLA_HOLDPER, +- .fixed_divider = 1, +- .flags = CLK_SET_RATE_PARENT), ++ ++ /* ++ * PLLA_PER is used for gpu clocks. Controlled by firmware, see ++ * clk-raspberrypi.c. ++ */ ++ + [BCM2835_PLLA_DSI0] = REGISTER_PLL_DIV( + SOC_ALL, + .name = "plla_dsi0", +@@ -2021,14 +2017,12 @@ static const struct bcm2835_clk_desc clk + .int_bits = 6, + .frac_bits = 0, + .tcnt_mux = 3), +- [BCM2835_CLOCK_V3D] = REGISTER_VPU_CLK( +- SOC_ALL, +- .name = "v3d", +- .ctl_reg = CM_V3DCTL, +- .div_reg = CM_V3DDIV, +- .int_bits = 4, +- .frac_bits = 8, +- .tcnt_mux = 4), ++ ++ /* ++ * CLOCK_V3D is used for v3d clock. Controlled by firmware, see ++ * clk-raspberrypi.c. ++ */ ++ + /* + * VPU clock. This doesn't have an enable bit, since it drives + * the bus for everything else, and is special so it doesn't need -- cgit v1.2.3