From a1383655cfaa71609d6236ae0fcf3b6047462b98 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= Date: Sat, 29 Feb 2020 09:25:20 +0100 Subject: bcm27xx: add linux 5.4 support MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Tested on bcm2710 (Raspberry Pi 3B). Signed-off-by: Álvaro Fernández Rojas --- ...835-dma-Add-support-for-per-channel-flags.patch | 48 ++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 target/linux/bcm27xx/patches-5.4/950-0142-bcm2835-dma-Add-support-for-per-channel-flags.patch (limited to 'target/linux/bcm27xx/patches-5.4/950-0142-bcm2835-dma-Add-support-for-per-channel-flags.patch') diff --git a/target/linux/bcm27xx/patches-5.4/950-0142-bcm2835-dma-Add-support-for-per-channel-flags.patch b/target/linux/bcm27xx/patches-5.4/950-0142-bcm2835-dma-Add-support-for-per-channel-flags.patch new file mode 100644 index 0000000000..8f68768588 --- /dev/null +++ b/target/linux/bcm27xx/patches-5.4/950-0142-bcm2835-dma-Add-support-for-per-channel-flags.patch @@ -0,0 +1,48 @@ +From d70a417420f9d10e86031ec24da68b71668aa833 Mon Sep 17 00:00:00 2001 +From: Phil Elwell +Date: Fri, 20 Jul 2018 22:03:41 +0100 +Subject: [PATCH] bcm2835-dma: Add support for per-channel flags + +Add the ability to interpret the high bits of the dreq specifier as +flags to be included in the DMA_CS register. The motivation for this +change is the ability to set the DISDEBUG flag for SD card transfers +to avoid corruption when using the VPU debugger. + +Signed-off-by: Phil Elwell +--- + drivers/dma/bcm2835-dma.c | 10 ++++++++-- + 1 file changed, 8 insertions(+), 2 deletions(-) + +--- a/drivers/dma/bcm2835-dma.c ++++ b/drivers/dma/bcm2835-dma.c +@@ -141,6 +141,10 @@ struct bcm2835_desc { + #define BCM2835_DMA_S_DREQ BIT(10) /* enable SREQ for source */ + #define BCM2835_DMA_S_IGNORE BIT(11) /* ignore source reads - read 0 */ + #define BCM2835_DMA_BURST_LENGTH(x) ((x & 15) << 12) ++#define BCM2835_DMA_CS_FLAGS(x) (x & (BCM2835_DMA_PRIORITY(15) | \ ++ BCM2835_DMA_PANIC_PRIORITY(15) | \ ++ BCM2835_DMA_WAIT_FOR_WRITES | \ ++ BCM2835_DMA_DIS_DEBUG)) + #define BCM2835_DMA_PER_MAP(x) ((x & 31) << 16) /* REQ source */ + #define BCM2835_DMA_WAIT(x) ((x & 31) << 21) /* add DMA-wait cycles */ + #define BCM2835_DMA_NO_WIDE_BURSTS BIT(26) /* no 2 beat write bursts */ +@@ -454,7 +458,8 @@ static void bcm2835_dma_start_desc(struc + c->desc = d = to_bcm2835_dma_desc(&vd->tx); + + writel(d->cb_list[0].paddr, c->chan_base + BCM2835_DMA_ADDR); +- writel(BCM2835_DMA_ACTIVE, c->chan_base + BCM2835_DMA_CS); ++ writel(BCM2835_DMA_ACTIVE | BCM2835_DMA_CS_FLAGS(c->dreq), ++ c->chan_base + BCM2835_DMA_CS); + } + + static irqreturn_t bcm2835_dma_callback(int irq, void *data) +@@ -481,7 +486,8 @@ static irqreturn_t bcm2835_dma_callback( + * if this IRQ handler is threaded.) If the channel is finished, it + * will remain idle despite the ACTIVE flag being set. + */ +- writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE, ++ writel(BCM2835_DMA_INT | BCM2835_DMA_ACTIVE | ++ BCM2835_DMA_CS_FLAGS(c->dreq), + c->chan_base + BCM2835_DMA_CS); + + d = c->desc; -- cgit v1.2.3