From 1343acc8cd9e5c4206c2f65f1897c7be5660f046 Mon Sep 17 00:00:00 2001 From: Rui Salvaterra Date: Thu, 27 Jan 2022 12:08:41 +0000 Subject: kernel: bump 5.10 to 5.10.94 Deleted (upstreamed): bcm27xx/patches-5.10/950-0669-drm-vc4-hdmi-Make-sure-the-device-is-powered-with-CE.patch [1] bcm27xx/patches-5.10/950-0672-drm-vc4-hdmi-Move-initial-register-read-after-pm_run.patch [1] gemini/patches-5.10/0003-ARM-dts-gemini-NAS4220-B-fis-index-block-with-128-Ki.patch [2] Manually rebased: bcm27xx/patches-5.10/950-0675-drm-vc4-hdmi-Drop-devm-interrupt-handler-for-CEC-int.patch Manually reverted: generic/pending-5.10/860-Revert-ASoC-mediatek-Check-for-error-clk-pointer.patch [3] [1] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.94&id=55b10b88ac8654fc2f31518aa349a2e643b37f18 [2] https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v5.10.94&id=958a8819d41420d7a74ed922a09cacc0ba3a4218 [3] https://lore.kernel.org/all/trinity-2a727d96-0335-4d03-8f30-e22a0e10112d-1643363480085@3c-app-gmx-bap33/ Signed-off-by: Rui Salvaterra Signed-off-by: Daniel Golle --- ...0-0538-drm-vc4-hdmi-Convert-to-the-new-clock-request-API.patch | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'target/linux/bcm27xx/patches-5.10/950-0538-drm-vc4-hdmi-Convert-to-the-new-clock-request-API.patch') diff --git a/target/linux/bcm27xx/patches-5.10/950-0538-drm-vc4-hdmi-Convert-to-the-new-clock-request-API.patch b/target/linux/bcm27xx/patches-5.10/950-0538-drm-vc4-hdmi-Convert-to-the-new-clock-request-API.patch index 227c27f01d..7208b02835 100644 --- a/target/linux/bcm27xx/patches-5.10/950-0538-drm-vc4-hdmi-Convert-to-the-new-clock-request-API.patch +++ b/target/linux/bcm27xx/patches-5.10/950-0538-drm-vc4-hdmi-Convert-to-the-new-clock-request-API.patch @@ -15,7 +15,7 @@ Signed-off-by: Maxime Ripard --- a/drivers/gpu/drm/vc4/vc4_hdmi.c +++ b/drivers/gpu/drm/vc4/vc4_hdmi.c -@@ -545,6 +545,9 @@ static void vc4_hdmi_encoder_post_crtc_p +@@ -546,6 +546,9 @@ static void vc4_hdmi_encoder_post_crtc_p HDMI_READ(HDMI_VID_CTL) & ~VC4_HD_VID_CTL_ENABLE); clk_disable_unprepare(vc4_hdmi->pixel_bvb_clock); @@ -25,7 +25,7 @@ Signed-off-by: Maxime Ripard clk_disable_unprepare(vc4_hdmi->pixel_clock); ret = pm_runtime_put(&vc4_hdmi->pdev->dev); -@@ -849,9 +852,9 @@ static void vc4_hdmi_encoder_pre_crtc_co +@@ -850,9 +853,9 @@ static void vc4_hdmi_encoder_pre_crtc_co * pixel clock, but HSM ends up being the limiting factor. */ hsm_rate = max_t(unsigned long, 120000000, (pixel_rate / 100) * 101); @@ -38,7 +38,7 @@ Signed-off-by: Maxime Ripard return; } -@@ -863,10 +866,12 @@ static void vc4_hdmi_encoder_pre_crtc_co +@@ -864,10 +867,12 @@ static void vc4_hdmi_encoder_pre_crtc_co * FIXME: When the pixel freq is 594MHz (4k60), this needs to be setup * at 300MHz. */ @@ -55,7 +55,7 @@ Signed-off-by: Maxime Ripard clk_disable_unprepare(vc4_hdmi->pixel_clock); return; } -@@ -874,6 +879,9 @@ static void vc4_hdmi_encoder_pre_crtc_co +@@ -875,6 +880,9 @@ static void vc4_hdmi_encoder_pre_crtc_co ret = clk_prepare_enable(vc4_hdmi->pixel_bvb_clock); if (ret) { DRM_ERROR("Failed to turn on pixel bvb clock: %d\n", ret); -- cgit v1.2.3