From 35cc26545e2deb0e5a3b9adb6b473d013852df81 Mon Sep 17 00:00:00 2001 From: Felix Fietkau Date: Tue, 24 Mar 2009 23:41:29 +0000 Subject: atheros: fix a spiflash write performance regression git-svn-id: svn://svn.openwrt.org/openwrt/trunk@15027 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/atheros/patches-2.6.28/120-spiflash.patch | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'target/linux/atheros') diff --git a/target/linux/atheros/patches-2.6.28/120-spiflash.patch b/target/linux/atheros/patches-2.6.28/120-spiflash.patch index e661365066..e33733ecfb 100644 --- a/target/linux/atheros/patches-2.6.28/120-spiflash.patch +++ b/target/linux/atheros/patches-2.6.28/120-spiflash.patch @@ -288,10 +288,10 @@ +} + +static void -+spiflash_wait_complete(struct spiflash_priv *priv) ++spiflash_wait_complete(struct spiflash_priv *priv, unsigned int timeout) +{ + busy_wait(priv, spiflash_sendcmd(priv, SPI_RD_STATUS, 0) & -+ SPI_STATUS_WIP, 20); ++ SPI_STATUS_WIP, timeout); + spiflash_done(priv); +} + @@ -321,7 +321,7 @@ + reg |= op->tx_cnt | SPI_CTL_START; + spiflash_write_reg(priv, SPI_FLASH_CTL, reg); + -+ spiflash_wait_complete(priv); ++ spiflash_wait_complete(priv, 20); + + instr->state = MTD_ERASE_DONE; + if (instr->callback) @@ -418,7 +418,7 @@ + reg |= (read_len + 4) | SPI_CTL_START; + spiflash_write_reg(priv, SPI_FLASH_CTL, reg); + -+ spiflash_wait_complete(priv); ++ spiflash_wait_complete(priv, 1); + + bytes_left -= read_len; + to += read_len; -- cgit v1.2.3