From 83b5fbddf28e943e8c90b4099a1e36d158f5995c Mon Sep 17 00:00:00 2001 From: Nick Hainke Date: Mon, 27 Dec 2021 02:17:43 +0100 Subject: kernel: 5.10: add patches to fix macronix flash mtd: spi-nor: locking support for MX25L6405D Macronix MX25L6405D supports locking with four block-protection bits. Currently, the driver only sets three bits. If the bootloader does not sustain the flash chip in an unlocked state, the flash might be non-writeable. Add the corresponding flag to enable locking support with four bits in the status register. mtd: spi-nor: disable 16-bit-sr for macronix Macronix flash chips seem to consist of only one status register. These chips will not work with the "16-bit Write Status (01h) Command". Disable SNOR_F_HAS_16BIT_SR for all Macronix chips. Refreshed: - 0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch Fixes: 15aa53d7ee65 ("ath79: switch to Kernel 5.10") Signed-off-by: Nick Hainke --- .../0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target/linux/ath79') diff --git a/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch b/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch index 317bef2201..e99d067c48 100644 --- a/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch +++ b/target/linux/ath79/patches-5.10/0052-mtd-spi-nor-use-4-bit-locking-for-MX25L12805D.patch @@ -21,7 +21,7 @@ Signed-off-by: David Bauer --- a/drivers/mtd/spi-nor/macronix.c +++ b/drivers/mtd/spi-nor/macronix.c -@@ -50,7 +50,8 @@ static const struct flash_info macronix_ +@@ -51,7 +51,8 @@ static const struct flash_info macronix_ { "mx25u4035", INFO(0xc22533, 0, 64 * 1024, 8, SECT_4K) }, { "mx25u8035", INFO(0xc22534, 0, 64 * 1024, 16, SECT_4K) }, { "mx25u6435f", INFO(0xc22537, 0, 64 * 1024, 128, SECT_4K) }, -- cgit v1.2.3