From 73ea763c0dcdb96c9163790f20edd964399035c0 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= Date: Sun, 16 Jan 2022 19:00:19 +0100 Subject: ath79: Add support for Ubiquiti NanoBeam AC Gen1 XC MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Ubiquiti NanoBeam AC Gen1 XC (NBE-5AC-19) is an outdoor 802.11ac CPE with a waterproof casing (ultrasonically welded) and bulb shaped. Hardware: - SoC: Qualcomm Atheros QCA9558 - RAM: 128 MB DDR2 - Flash: 16 MB SPI NOR - Ethernet: 1x GbE, AR8033 phy connected via SGMII - PSU: 24 Vdc passive PoE - WiFi 5 GHz: Qualcomm Atheros QCA988X - Buttons: 1x reset - LEDs: 1x power, 1x Ethernet, 4x RSSI, all blue - Internal antenna: 19 dBi planar Installation from stock airOS firmware: - Follow instructions for XC-type Ubiquiti devices on OpenWrt wiki at https://openwrt.org/toh/ubiquiti/common Signed-off-by: Daniel González Cabanelas --- .../ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts | 111 +++++++++++++++++++++ 1 file changed, 111 insertions(+) create mode 100644 target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts (limited to 'target/linux/ath79/dts') diff --git a/target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts b/target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts new file mode 100644 index 0000000000..14388079b6 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_ubnt_nanobeam-ac-xc.dts @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Device Tree file for Ubiquiti Nanobeam NBE-5AC-19 (XC) + * + * Copyright (C) 2022 Daniel González Cabanelas + * based on device tree from qca9558_ubnt_powerbeam-5ac-500.dts + */ + +#include "qca955x_ubnt_xc.dtsi" + +/ { + compatible = "ubnt,nanobeam-ac-xc", "ubnt,xc", "qca,qca9558"; + model = "Ubiquiti NanoBeam AC Gen1 (XC)"; + + aliases { + led-boot = &led_power; + led-failsafe = &led_power; + led-running = &led_power; + led-upgrade = &led_power; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "Reset button"; + linux,code = ; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + + led_spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + sck-gpios = <&gpio 0 GPIO_ACTIVE_HIGH>; + mosi-gpios = <&gpio 1 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio 3 GPIO_ACTIVE_HIGH>; + num-chipselects = <1>; + + led_gpio: led_gpio@0 { + compatible = "fairchild,74hc595"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <1>; + spi-max-frequency = <10000000>; + enable-gpios = <&gpio 18 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + + rssi0 { + label = "blue:rssi0"; + gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>; + }; + rssi1 { + label = "blue:rssi1"; + gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>; + }; + rssi2 { + label = "blue:rssi2"; + gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>; + }; + rssi3 { + label = "blue:rssi3"; + gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>; + }; + led_power: power { + label = "blue:power"; + gpios = <&led_gpio 4 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + }; +}; + +&mdio0 { + status = "okay"; + + phy-mask = <4>; + phy4: ethernet-phy@4 { + phy-mode = "sgmii"; + reg = <4>; + at803x-override-sgmii-link-check; + }; +}; + +ð0 { + status = "okay"; + + pll-reg = <0 0x48 0>; + pll-data = <0x03000000 0x00000101 0x00001313>; + nvmem-cells = <&macaddr_art_0>; + nvmem-cell-names = "mac-address"; + phy-mode = "sgmii"; + phy-handle = <&phy4>; +}; + +&art { + compatible = "nvmem-cells"; + #address-cells = <1>; + #size-cells = <1>; + + macaddr_art_0: macaddr@0 { + reg = <0x0 0x6>; + }; +}; -- cgit v1.2.3