From 78277ec162b06e859923936ee00d02920b4ccc6f Mon Sep 17 00:00:00 2001 From: Paul Wassi Date: Fri, 4 Jan 2019 22:38:17 +0100 Subject: ar71xx: fix TL-MR3220-v2 switch port order Fix the switch port order for proper display on high level interfaces. Signed-off-by: Paul Wassi --- target/linux/ar71xx/base-files/etc/board.d/02_network | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target/linux/ar71xx') diff --git a/target/linux/ar71xx/base-files/etc/board.d/02_network b/target/linux/ar71xx/base-files/etc/board.d/02_network index b761c7c920..13dfd2b000 100755 --- a/target/linux/ar71xx/base-files/etc/board.d/02_network +++ b/target/linux/ar71xx/base-files/etc/board.d/02_network @@ -41,7 +41,6 @@ ar71xx_setup_interfaces() tew-712br|\ tew-732br|\ tl-mr3220|\ - tl-mr3220-v2|\ tl-mr3420|\ tl-wdr3320-v2|\ tl-wdr3500|\ @@ -520,6 +519,7 @@ ar71xx_setup_interfaces() ucidef_add_switch "switch0" \ "1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "9@eth0" ;; + tl-mr3220-v2|\ tl-wr741nd-v4) ucidef_set_interfaces_lan_wan "eth0.1" "eth1" ucidef_add_switch "switch0" \ -- cgit v1.2.3